From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752829AbbFFNO0 (ORCPT ); Sat, 6 Jun 2015 09:14:26 -0400 Received: from mail-bn1on0111.outbound.protection.outlook.com ([157.56.110.111]:54848 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752277AbbFFNOQ (ORCPT ); Sat, 6 Jun 2015 09:14:16 -0400 Authentication-Results: spf=none (sender IP is 165.204.84.221) smtp.mailfrom=amd.com; alien8.de; dkim=none (message not signed) header.d=none; X-WSS-ID: 0NPIY3E-07-VJY-02 X-M-MSG: From: Wan ZongShun To: , , , , CC: , , Wan ZongShun , Wan ZongShun Subject: [PATCH 3/3] SDHCI: Change AMD SDHCI quirk application scope Date: Sat, 6 Jun 2015 21:13:40 +0800 Message-ID: <1433596420-5612-3-git-send-email-Vincent.Wan@amd.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1433596420-5612-1-git-send-email-Vincent.Wan@amd.com> References: <1433596420-5612-1-git-send-email-Vincent.Wan@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BN1AFFO11FD014;1:0i7JYPIgvPxNk68bGhzRrwNCl1LrfQ9xm8kwGrscTU2WYE2Ott5jyzJhLXQ1QzfNbTw3s5klpEDXqst4oLnGz/EtygRMlHlyHfhjU1m+oZ6+Pm1gYbGkOxKEhyhgeMtkHIjk+w8KeatMXAzy3VFpk1uSr/5D+EtGp+f1gWag0nZAtBw+UQB/IlFude4Cs3Zs+Ot/zLsuNZLmEszn+sh8tuHYEZYVfu9R6uvc5t0KaMGwBdjZzetEv2gUipJrr8a2j75rSDWHvUsOHmZfsbswmfl0XrZqGsab59OwjKRKFj5a9AAzBw0LzEfQUtbod171 X-Forefront-Antispam-Report: CIP:165.204.84.221;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(428002)(189002)(199003)(47776003)(19580405001)(19580395003)(76176999)(62966003)(50226001)(77156002)(50466002)(50986999)(46102003)(2950100001)(77096005)(106466001)(229853001)(101416001)(92566002)(5001920100001)(86362001)(53416004)(87936001)(48376002)(105586002)(2201001)(5001770100001)(189998001)(36756003)(217873001);DIR:OUT;SFP:1102;SCL:1;SRVR:BY2PR02MB250;H:atltwp01.amd.com;FPR:;SPF:None;MLV:sfv;MX:1;A:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY2PR02MB250;UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY2PR02MB314; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(520003)(5005006)(3002001);SRVR:BY2PR02MB250;BCL:0;PCL:0;RULEID:;SRVR:BY2PR02MB250; X-Forefront-PRVS: 05991796DF X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jun 2015 13:14:03.1198 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96;Ip=[165.204.84.221];Helo=[atltwp01.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY2PR02MB250 X-OriginatorOrg: amd.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Change this quirk to apply to AMD Carrizo platform. Signed-off-by: Wan ZongShun Signed-off-by: Wan ZongShun Tested-by: Nath, Arindam Tested-by: Ramesh, Ramya --- drivers/mmc/host/sdhci-pci.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index f208f20..94f54d2 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -724,14 +724,37 @@ static const struct sdhci_pci_fixes sdhci_rtsx = { .probe_slot = rtsx_probe_slot, }; +/*AMD chipset generation*/ +enum amd_chipset_gen { + AMD_CHIPSET_BEFORE_ML, + AMD_CHIPSET_CZ, + AMD_CHIPSET_NL, + AMD_CHIPSET_UNKNOWN, +}; + static int amd_probe(struct sdhci_pci_chip *chip) { struct pci_dev *smbus_dev; + enum amd_chipset_gen gen; smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL); + if (smbus_dev) { + gen = AMD_CHIPSET_BEFORE_ML; + } else { + smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, + PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL); + if (smbus_dev) { + if (smbus_dev->revision < 0x51) + gen = AMD_CHIPSET_CZ; + else + gen = AMD_CHIPSET_NL; + } else { + gen = AMD_CHIPSET_UNKNOWN; + } + } - if (smbus_dev && (smbus_dev->revision < 0x51)) { + if ((gen == AMD_CHIPSET_BEFORE_ML) || (gen == AMD_CHIPSET_CZ)) { chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD; chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200; } -- 1.9.1