From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932228AbbFIDPE (ORCPT ); Mon, 8 Jun 2015 23:15:04 -0400 Received: from mail-bl2on0129.outbound.protection.outlook.com ([65.55.169.129]:15461 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753520AbbFIDOy (ORCPT ); Mon, 8 Jun 2015 23:14:54 -0400 Authentication-Results: spf=none (sender IP is 165.204.84.221) smtp.mailfrom=amd.com; amacapital.net; dkim=none (message not signed) header.d=none; X-WSS-ID: 0NPNQCJ-07-NED-02 X-M-MSG: From: Huang Rui To: Borislav Petkov , Andy Lutomirski , Thomas Gleixner , Peter Zijlstra , "Rafael J. Wysocki" , Len Brown , "John Stultz" , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Weisbecker?= CC: , , Fengguang Wu , Aaron Lu , Suravee Suthikulanit , Tony Li , Ken Xue , Huang Rui Subject: [PATCH v2 1/4] x86, mwaitt: add monitorx and mwaitx instruction Date: Tue, 9 Jun 2015 11:13:38 +0800 Message-ID: <1433819621-15093-2-git-send-email-ray.huang@amd.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1433819621-15093-1-git-send-email-ray.huang@amd.com> References: <1433819621-15093-1-git-send-email-ray.huang@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BN1AFFO11FD049;1:mcYd4KtWyMCfS2o6XSSpDnZ3j+krZSiq0reqyzKYhpWuNoi8JZ07gB5Pu+P+MJEY9iPQUho0U3EIMzFW8kTHlqZeb/o7DyQfL6YernWlGxpkYAz31JNdvR9vSJQFJsFGqC70upf8xYk/Mmj4Qe19HtFh4ooGSA9+Ob2j3JyWGpiwxrGzV9rgLL77/Muz/gnVsxdMItPV0vfa3A8Tc3KIf1jKE5DlwC9RK5wOLvbJszVW2OBMf7iJM4EPzQGZQmD7oQzJIg1zhil7gdFeitJ2enb+WKLH914q3nKkXrDZfO7gNc556I5FtPFzYfnuY7YgnGM70W8TkOvhe5egsteXKw== X-Forefront-Antispam-Report: CIP:165.204.84.221;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(428002)(189002)(199003)(33646002)(92566002)(50226001)(105586002)(2950100001)(76176999)(77096005)(101416001)(106466001)(50986999)(229853001)(5001770100001)(77156002)(62966003)(36756003)(53416004)(189998001)(87936001)(19580395003)(19580405001)(46102003)(48376002)(86362001)(575784001)(50466002)(47776003);DIR:OUT;SFP:1102;SCL:1;SRVR:BLUPR02MB242;H:atltwp01.amd.com;FPR:;SPF:None;MLV:sfv;MX:1;A:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR02MB242; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(520003)(5005006)(3002001);SRVR:BLUPR02MB242;BCL:0;PCL:0;RULEID:;SRVR:BLUPR02MB242; X-Forefront-PRVS: 06022AA85F X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jun 2015 03:14:44.7949 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96;Ip=[165.204.84.221];Helo=[atltwp01.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR02MB242 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On AMD Carrizo processors (Family 15h, Model 60h-6fh), there is a new feature called MWAITT (Mwait with a timer) as an extension of Monitor/Mwait. MWAITT, another name is MWAITX (MWAIT with extensions), has a configurable timer that causes MWAITX to exit on expiration. Compared with MONITOR/MWAIT, there are minor differences in opcode and input parameters. MWAITX ECX[1]: enable timer if set MWAITX EBX[31:0]: max wait time expressed in SW P0 clocks The software P0 frequency is the same as the TSC frequency. Max timeout = EBX/(TSC frequency) Signed-off-by: Huang Rui --- arch/x86/include/asm/cpufeature.h | 1 + arch/x86/include/asm/mwait.h | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 3d6606f..3ef1f6e 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -176,6 +176,7 @@ #define X86_FEATURE_PERFCTR_NB ( 6*32+24) /* NB performance counter extensions */ #define X86_FEATURE_BPEXT (6*32+26) /* data breakpoint extension */ #define X86_FEATURE_PERFCTR_L2 ( 6*32+28) /* L2 performance counter extensions */ +#define X86_FEATURE_MWAITT ( 6*32+29) /* Mwait extension (MonitorX/MwaitX) */ /* * Auxiliary flags: Linux defined - For features scattered in various diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h index 653dfa7..ece8048 100644 --- a/arch/x86/include/asm/mwait.h +++ b/arch/x86/include/asm/mwait.h @@ -23,6 +23,14 @@ static inline void __monitor(const void *eax, unsigned long ecx, :: "a" (eax), "c" (ecx), "d"(edx)); } +static inline void __monitorx(const void *eax, unsigned long ecx, + unsigned long edx) +{ + /* "monitorx %eax, %ecx, %edx;" */ + asm volatile(".byte 0x0f, 0x01, 0xfa;" + :: "a" (eax), "c" (ecx), "d"(edx)); +} + static inline void __mwait(unsigned long eax, unsigned long ecx) { /* "mwait %eax, %ecx;" */ @@ -30,6 +38,14 @@ static inline void __mwait(unsigned long eax, unsigned long ecx) :: "a" (eax), "c" (ecx)); } +static inline void __mwaitx(unsigned long eax, unsigned long ebx, + unsigned long ecx) +{ + /* "mwaitx %eax, %ebx, %ecx;" */ + asm volatile(".byte 0x0f, 0x01, 0xfb;" + :: "a" (eax), "b" (ebx), "c" (ecx)); +} + static inline void __sti_mwait(unsigned long eax, unsigned long ecx) { trace_hardirqs_on(); -- 1.7.9.5