From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755059AbbFLKHF (ORCPT ); Fri, 12 Jun 2015 06:07:05 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:39161 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752482AbbFLKHA (ORCPT ); Fri, 12 Jun 2015 06:07:00 -0400 X-AuditID: cbfee68f-f793b6d000005f66-96-557aaf422777 From: Hyungwon Hwang To: dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, inki.dae@samsung.com Cc: stable@vger.kernel.org, sw0312.kim@samsung.com, jy0922.shim@samsung.com, Hyungwon Hwang Subject: [PATCH v2] ARM: dts: fix the clock-frequency of rinato board's panel Date: Fri, 12 Jun 2015 19:06:50 +0900 Message-id: <1434103610-24182-1-git-send-email-human.hwang@samsung.com> X-Mailer: git-send-email 1.9.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHLMWRmVeSWpSXmKPExsWyRsSkRNdpfVWowdGzUhZXvr5ns1g6o4/V YtL9CSwWL+5dZLG4vGsOm8WM8/uYLBZsfMRoMWPySzYHDo/73ceZPPq2rGL0+LxJLoA5issm JTUnsyy1SN8ugSvjY9NHxoJF7BXrr5xmbmBsZOti5OSQEDCRODrrNzuELSZx4d56oDgXh5DA UkaJKc2fmGCKuma9YYZITGeU+LRoJpTzg1Hi3wOIdjYBPYkF136A2SICNRKvP/0F62YWKJd4 dPoMC4gtLOArsfXYZqA4BweLgKrE32+RIGFeAXeJTx8nMUMsk5M4eWwyK8h8CYHPbBIPf80G m8kiICDxbfIhFpBeCQFZiU0HoOolJQ6uuMEygVFwASPDKkbR1ILkguKk9CJjveLE3OLSvHS9 5PzcTYzAYD3971n/Dsa7B6wPMQpwMCrx8CZoVYUKsSaWFVfmHmI0BdowkVlKNDkfGBN5JfGG xmZGFqYmpsZG5pZmSuK8C6V+BgsJpCeWpGanphakFsUXleakFh9iZOLglGpgLA84YLR27yct TmG208/3P5CZ9m89g+W55zzcP4/OTXs2t5ptOk/uEpc9iwX9OfXOXF4smuwvVFbKvjn921Ht ZzU3b3mfWjZp1rQF3PwFP1hltghPLVqhLr5Y8/Xvbcq3ol5YXOELrjv4dqmn9cnrmaX9vvVP GtPd1zL5R5advdG984xqlEVGmRJLcUaioRZzUXEiAHclLv5RAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupgkeLIzCtJLcpLzFFi42I5/e+xoK7T+qpQg3t7RCyufH3PZrF0Rh+r xaT7E1gsXty7yGJxedccNosZ5/cxWSzY+IjRYsbkl2wOHB73u48zefRtWcXo8XmTXABzVAOj TUZqYkpqkUJqXnJ+SmZeuq2Sd3C8c7ypmYGhrqGlhbmSQl5ibqqtkotPgK5bZg7QCUoKZYk5 pUChgMTiYiV9O0wTQkPcdC1gGiN0fUOC4HqMDNBAwhrGjI9NHxkLFrFXrL9ymrmBsZGti5GT Q0LARKJr1htmCFtM4sK99UBxLg4hgemMEp8WzWSGcH4wSvx78JsdpIpNQE9iwbUfYLaIQI3E 609/mUBsZoFyiUenz7CA2MICvhJbj20GinNwsAioSvz9FgkS5hVwl/j0cRLUMjmJk8cms05g 5F7AyLCKUTS1ILmgOCk911CvODG3uDQvXS85P3cTIzgWnkntYFzZYHGIUYCDUYmH96F/VagQ a2JZcWXuIUYJDmYlEd49S4BCvCmJlVWpRfnxRaU5qcWHGE2Blk9klhJNzgfGaV5JvKGxiZmR pZG5oYWRsbmSOO/JfJ9QIYH0xJLU7NTUgtQimD4mDk6pBkbu6TKJIQUn6l6z+t4UZXvUuPdV hqydsPePrZxTI3ILRbMzZ8Y1McYa/9n79dPU3x7JU/vUGc9LcM77ySZdZmYwgX2e559FeeeN 70yc5/HzXn2pSb7dtFBpfw+9zJeSE785Tl9kFrk19GZN6tLUDpcU/aTdlZknXDi+Ndr5vn4p tJXjw93zb5RYijMSDbWYi4oTASVztLybAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org After the commit abc0b1447d4974963548777a5ba4a4457c82c426 ("drm: Perform basic sanity checks on probed modes"), proper clock-frequency becomes mandatory for validating the mode of panel. The display does not work if there is no mode validated. Also, this clock-frequency must be set appropriately for getting required frame rate. Signed-off-by: Hyungwon Hwang --- arch/arm/boot/dts/exynos3250-rinato.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 0b99068..75aba40 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -181,7 +181,7 @@ display-timings { timing-0 { - clock-frequency = <0>; + clock-frequency = <4600000>; hactive = <320>; vactive = <320>; hfront-porch = <1>; -- 1.9.1