From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755936AbbFOOg4 (ORCPT ); Mon, 15 Jun 2015 10:36:56 -0400 Received: from mail-bn1on0068.outbound.protection.outlook.com ([157.56.110.68]:6451 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755699AbbFOOgj (ORCPT ); Mon, 15 Jun 2015 10:36:39 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none; From: Punnaiah Choudary Kalluri To: , , , , , , , , CC: , , , , , , "Punnaiah Choudary Kalluri" Subject: [PATCH v2 1/2] Documentation: dt: Add Xilinx zynqmp dma device tree binding documentation Date: Mon, 15 Jun 2015 20:06:21 +0530 Message-ID: <1434378982-30184-1-git-send-email-punnaia@xilinx.com> X-Mailer: git-send-email 1.7.4 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-21614.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BL2FFO11FD041;1:FcqI5USkLuWzuTlNQDNqY2esIu1t2zBNr9xjKXoHAk38ut2pVgBgshIuIp2ApgdgCAD8BN72XrxDAWUl0W+RDOg3mVZt68iDj/PqEK1h/27ZZLJl4xn4nodvUH5Pd+NvCtV/0X6Ltlvy3bvoQsp9hy/7xzlIzzo2U1t7osUkgMWSHt+ENiPPwmEU0MsEb4Xk6vONWHac1hKJaBhxJ4J4ydYkXezSTY2u16w7uLFkUQTCqwGFJ+GgnN5hXYHW9FmfsKtUctUqahz787nvd7abP3wKZdb71rqXqQFmx/S+/OMG28lWiK72WeuQsWHwZ0UtOTMAVSNloD34voygZ8LZWSS1XQrAvH1/9Gzub4XfXus= X-Forefront-Antispam-Report: CIP:149.199.60.100;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(438002)(189002)(199003)(87936001)(86362001)(106466001)(46386002)(42186005)(48376002)(47776003)(50466002)(50226001)(229853001)(107886002)(46102003)(45336002)(551934003)(103686003)(6806004)(62966003)(92566002)(33646002)(19580405001)(77156002)(63266004)(36756003)(189998001)(5001960100002)(52956003)(19580395003)(5001770100001)(2201001)(50986999)(107986001)(4001430100001)(90966001);DIR:OUT;SFP:1101;SCL:1;SRVR:BL2FFO11HUB022;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;MLV:sfv;MX:1;A:1;LANG:en; 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Signed-off-by: Punnaiah Choudary Kalluri --- Changes in v2: - None --- .../devicetree/bindings/dma/xilinx/zynqmp_dma.txt | 61 ++++++++++++++++++++ 1 files changed, 61 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt diff --git a/Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt new file mode 100644 index 0000000..e4f92b9 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt @@ -0,0 +1,61 @@ +Xilinx ZynqMP DMA engine, it does support memory to memory transfers, +memory to device and device to memory transfers. It also has flow +control and rate control support for slave/peripheral dma access. + +Required properties: +- compatible: Should be "xlnx,zynqmp-dma-1.0" +- #dma-cells: Should be <1>, a single cell holding a line request number +- reg: Memory map for module access +- interrupt-parent: Interrupt controller the interrupt is routed through +- interrupts: Should contain DMA channel interrupt +- xlnx,bus-width: AXI buswidth in bits. Should contain 128 or 64 + +Optional properties: +- xlnx,include-sg: Indicates the controller to operate in simple or scatter + gather dma mode +- xlnx,ratectrl: Scheduling interval in terms of clock cycles for + source AXI transaction +- xlnx,overfetch: Tells whether the channel is allowed to over fetch the data +- xlnx,src-issue: Number of AXI outstanding transactions on source side +- xlnx,desc-axi-cohrnt: Tells whether the AXI transactions generated for the + descriptor read are marked Non-coherent +- xlnx,src-axi-cohrnt: Tells whether the AXI transactions generated for the + source descriptor payload are marked Non-coherent +- xlnx,dst-axi-cohrnt: Tells whether the AXI transactions generated for the + dst descriptor payload are marked Non-coherent +- xlnx,desc-axi-qos: AXI QOS bits to be used for descriptor fetch +- xlnx,src-axi-qos: AXI QOS bits to be used for data read +- xlnx,dst-axi-qos: AXI QOS bits to be used for data write +- xlnx,desc-axi-cache: AXI cache bits to be used for descriptor fetch. +- xlnx,desc-axi-cache: AXI cache bits to be used for data read +- xlnx,desc-axi-cache: AXI cache bits to be used for data write +- xlnx,src-burst-len: AXI length for data read. Support only power of 2 values + i.e 1,2,4,8 and 16 +- xlnx,dst-burst-len: AXI length for data write. Support only power of 2 values + i.e 1,2,4,8 and 16 + +Example: +++++++++ +fpd_dma_chan1: dma@FD500000 { + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xFD500000 0x1000>; + #dma_cells = <1>; + interrupt-parent = <&gic>; + interrupts = <0 117 4>; + xlnx,bus-width = <128>; + xlnx,include-sg; + xlnx,overfetch; + xlnx,ratectrl = <0>; + xlnx,src-issue = <16>; + xlnx,desc-axi-cohrnt; + xlnx,src-axi-cohrnt; + xlnx,dst-axi-cohrnt; + xlnx,desc-axi-qos = <0>; + xlnx,desc-axi-cache = <0>; + xlnx,src-axi-qos = <0>; + xlnx,src-axi-cache = <2>; + xlnx,dst-axi-qos = <0>; + xlnx,dst-axi-cache = <2>; + xlnx,src-burst-len = <4>; + xlnx,dst-burst-len = <4>; +}; -- 1.7.4