From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753866AbbGIQo6 (ORCPT ); Thu, 9 Jul 2015 12:44:58 -0400 Received: from mga03.intel.com ([134.134.136.65]:10306 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753729AbbGIQo2 (ORCPT ); Thu, 9 Jul 2015 12:44:28 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,441,1432623600"; d="scan'208";a="725843292" From: Andy Shevchenko To: linux-kernel@vger.kernel.org, Sascha Hauer , Peter De Schrijver , Tero Kristo , Stephen Boyd , Russell King , Dinh Nguyen Cc: Andy Shevchenko Subject: [PATCH v4 3/6] clk: socfpga: switch to GENMASK() Date: Thu, 9 Jul 2015 19:43:51 +0300 Message-Id: <1436460234-61425-4-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1436460234-61425-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1436460234-61425-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the code to use GENMASK() helper instead of div_mask() macro. Signed-off-by: Andy Shevchenko --- drivers/clk/socfpga/clk-gate.c | 2 +- drivers/clk/socfpga/clk-periph.c | 2 +- drivers/clk/socfpga/clk.h | 1 - 3 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c index dd3a78c..d61052e 100644 --- a/drivers/clk/socfpga/clk-gate.c +++ b/drivers/clk/socfpga/clk-gate.c @@ -110,7 +110,7 @@ static unsigned long socfpga_clk_recalc_rate(struct clk_hw *hwclk, div = socfpgaclk->fixed_div; else if (socfpgaclk->div_reg) { val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; - val &= div_mask(socfpgaclk->width); + val &= GENMASK(socfpgaclk->width - 1, 0); /* Check for GPIO_DB_CLK by its offset */ if ((int) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET) div = val + 1; diff --git a/drivers/clk/socfpga/clk-periph.c b/drivers/clk/socfpga/clk-periph.c index 46531c3..fc410a4 100644 --- a/drivers/clk/socfpga/clk-periph.c +++ b/drivers/clk/socfpga/clk-periph.c @@ -36,7 +36,7 @@ static unsigned long clk_periclk_recalc_rate(struct clk_hw *hwclk, } else { if (socfpgaclk->div_reg) { val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; - val &= div_mask(socfpgaclk->width); + val &= GENMASK(socfpgaclk->width - 1, 0); parent_rate /= (val + 1); } div = ((readl(socfpgaclk->hw.reg) & 0x1ff) + 1); diff --git a/drivers/clk/socfpga/clk.h b/drivers/clk/socfpga/clk.h index d291f60..5278156 100644 --- a/drivers/clk/socfpga/clk.h +++ b/drivers/clk/socfpga/clk.h @@ -27,7 +27,6 @@ #define CLKMGR_PERPLL_SRC 0xAC #define SOCFPGA_MAX_PARENTS 3 -#define div_mask(width) ((1 << (width)) - 1) extern void __iomem *clk_mgr_base_addr; -- 2.1.4