[PATCH v5 6/8] clk: hisilicon: switch to GENMASK()

[Andy Shevchenko <andriy.shevchenko@linux.intel.com>]

Convert the code to use GENMASK() helper instead of div_mask() macro.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/clk/hisilicon/clkdivider-hi6220.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/hisilicon/clkdivider-hi6220.c b/drivers/clk/hisilicon/clkdivider-hi6220.c
index 113eee8..65ab03f 100644
--- a/drivers/clk/hisilicon/clkdivider-hi6220.c
+++ b/drivers/clk/hisilicon/clkdivider-hi6220.c
@@ -18,8 +18,6 @@
 #include <linux/err.h>
 #include <linux/spinlock.h>
 
-#define div_mask(width)	((1 << (width)) - 1)
-
 /**
  * struct hi6220_clk_divider - divider clock for hi6220
  *
@@ -51,7 +49,7 @@ static unsigned long hi6220_clkdiv_recalc_rate(struct clk_hw *hw,
 	struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw);
 
 	val = readl_relaxed(dclk->reg) >> dclk->shift;
-	val &= div_mask(dclk->width);
+	val &= GENMASK(dclk->width - 1, 0);
 
 	return divider_recalc_rate(hw, parent_rate, val, dclk->table,
 				   CLK_DIVIDER_ROUND_CLOSEST);
@@ -81,7 +79,7 @@ static int hi6220_clkdiv_set_rate(struct clk_hw *hw, unsigned long rate,
 		spin_lock_irqsave(dclk->lock, flags);
 
 	data = readl_relaxed(dclk->reg);
-	data &= ~(div_mask(dclk->width) << dclk->shift);
+	data &= ~(GENMASK(dclk->width - 1, 0) << dclk->shift);
 	data |= value << dclk->shift;
 	data |= dclk->mask;
 
@@ -116,7 +114,7 @@ struct clk *hi6220_register_clkdiv(struct device *dev, const char *name,
 		return ERR_PTR(-ENOMEM);
 
 	/* Init the divider table */
-	max_div = div_mask(width) + 1;
+	max_div = BIT(width);
 	min_div = 1;
 
 	table = kcalloc(max_div + 1, sizeof(*table), GFP_KERNEL);
-- 
2.1.4