From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932686AbbG1O75 (ORCPT ); Tue, 28 Jul 2015 10:59:57 -0400 Received: from mail-by2on0121.outbound.protection.outlook.com ([207.46.100.121]:35428 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932298AbbG1O7y (ORCPT ); Tue, 28 Jul 2015 10:59:54 -0400 Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none; From: Claudiu Manoil To: , , , CC: , , Alison Wang Subject: [PATCH,v3 3/3] ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR Date: Tue, 28 Jul 2015 17:43:56 +0300 Message-ID: <1438094636-20421-3-git-send-email-claudiu.manoil@freescale.com> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1438094636-20421-1-git-send-email-claudiu.manoil@freescale.com> References: <20150727142816.GP12927@tiger> <1438094636-20421-1-git-send-email-claudiu.manoil@freescale.com> X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BL2FFO11FD053;1:7iQIkkOOw7RWWK8qJjXE2BKlOPWDFOf9YGLGc1LZYhMtpxD/qbOPKDYkevSFuqNO4hnaNp5X/+Pn0ykyJLMk4tcxU2eHH6iQLcXhZCKr7OaYzWJTtvdF9TTsC0vgjYe+Q7qdxMAqk8iaTPn4jDxLFNQ4m0p+Y2myYkUGGthLuX0K1jxGVljziAGi+OOFthOY9D7T2F4XfCi+vIes/YSuKUrqizhm5/WTUuXvOsCjTfcrLIpDJlBdu8uLuDoe2q2d1eEQYnDhKW8uLLZlpCPhafFoEVNUgsjlC5ovzmSUIFAhlpMKOWlWjZDbWFrRVoAw8HLVf4KmQM6jdUc5Y078yA== X-Forefront-Antispam-Report: CIP:192.88.158.2;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(2980300002)(339900001)(199003)(189002)(2950100001)(2201001)(106466001)(36756003)(77096005)(92566002)(62966003)(5001960100002)(189998001)(5001770100001)(85426001)(105606002)(104016003)(76176999)(6806004)(107886002)(19580405001)(50226001)(46102003)(33646002)(47776003)(87936001)(77156002)(48376002)(229853001)(19580395003)(50986999)(86362001)(142933001)(4001430100001);DIR:OUT;SFP:1102;SCL:1;SRVR:CY1PR0301MB0873;H:az84smr01.freescale.net;FPR:;SPF:Fail;MLV:sfv;A:1;MX:1;LANG:en; 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For the QDS, SGMII connections (via riser cards) are assumed for the eTSEC0 and eTSEC1 ports as default configuration. Signed-off-by: Alison Wang Signed-off-by: Claudiu Manoil --- v2, v3 - none; arch/arm/boot/dts/ls1021a-qds.dts | 20 ++++++++++++++++++++ arch/arm/boot/dts/ls1021a-twr.dts | 20 ++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts index 9c5e16b..f16a061 100644 --- a/arch/arm/boot/dts/ls1021a-qds.dts +++ b/arch/arm/boot/dts/ls1021a-qds.dts @@ -75,6 +75,26 @@ }; }; +&enet0 { + tbi-handle = <&tbi0>; + phy-handle = <&sgmii_phy1c>; + phy-connection-type = "sgmii"; + status = "okay"; +}; + +&enet1 { + tbi-handle = <&tbi0>; + phy-handle = <&sgmii_phy1d>; + phy-connection-type = "sgmii"; + status = "okay"; +}; + +&enet2 { + phy-handle = <&rgmii_phy3>; + phy-connection-type = "rgmii-id"; + status = "okay"; +}; + &i2c0 { status = "okay"; diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts index a2c591e..4b61766 100644 --- a/arch/arm/boot/dts/ls1021a-twr.dts +++ b/arch/arm/boot/dts/ls1021a-twr.dts @@ -73,6 +73,26 @@ }; }; +&enet0 { + tbi-handle = <&tbi1>; + phy-handle = <&sgmii_phy2>; + phy-connection-type = "sgmii"; + status = "okay"; +}; + +&enet1 { + tbi-handle = <&tbi1>; + phy-handle = <&sgmii_phy0>; + phy-connection-type = "sgmii"; + status = "okay"; +}; + +&enet2 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii-id"; + status = "okay"; +}; + &i2c0 { status = "okay"; }; -- 1.7.11.7