From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755014AbbG3IOu (ORCPT ); Thu, 30 Jul 2015 04:14:50 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:53403 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754960AbbG3IOp (ORCPT ); Thu, 30 Jul 2015 04:14:45 -0400 From: Kishon Vijay Abraham I To: , , , , , CC: , , , , , , , , Subject: [PATCH 3/7] ARM: dts: dra72-evm: Set max clock frequency of MMC1 and MMC2 Date: Thu, 30 Jul 2015 13:43:36 +0530 Message-ID: <1438244020-4244-4-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1438244020-4244-1-git-send-email-kishon@ti.com> References: <1438244020-4244-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MMC1 supports SDR104 and MMC2 supports HS200 both of which requires 192MHz clock. Set the maximum operating clock frequency to 192 MHz. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra72-evm.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index 3998d37..c5d8e7d 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -508,6 +508,7 @@ * is a viable alternative */ cd-gpios = <&gpio6 27 0>; + max-frequency = <192000000>; }; &mmc2 { @@ -519,6 +520,7 @@ vmmc-supply = <&evm_3v3>; bus-width = <8>; ti,non-removable; + max-frequency = <192000000>; }; &dra7_pmx_core { -- 1.7.9.5