From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753737AbbHGN47 (ORCPT ); Fri, 7 Aug 2015 09:56:59 -0400 Received: from mail-wi0-f171.google.com ([209.85.212.171]:34694 "EHLO mail-wi0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753706AbbHGN44 (ORCPT ); Fri, 7 Aug 2015 09:56:56 -0400 From: Hans Ulli Kroll To: arm@kernel.org Cc: linux-kernel@vger.kernel.org, Arnd Bergmann , Olof Johansson , Roman Yeryomin , Hans Ulli Kroll Subject: [PATCH 3/3] ARM:Gemini:setup timer3 as free running timer Date: Fri, 7 Aug 2015 15:56:03 +0200 Message-Id: <1438955763-17260-4-git-send-email-ulli.kroll@googlemail.com> X-Mailer: git-send-email 2.4.6 In-Reply-To: <1438955763-17260-1-git-send-email-ulli.kroll@googlemail.com> References: <1438955763-17260-1-git-send-email-ulli.kroll@googlemail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the original driver it is missed to setup a free running driver. This timer is needed for the scheduler. So setup it. Signed-off-by: Hans Ulli Kroll --- arch/arm/mach-gemini/time.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-gemini/time.c b/arch/arm/mach-gemini/time.c index 5e2b1ba..f5f18df 100644 --- a/arch/arm/mach-gemini/time.c +++ b/arch/arm/mach-gemini/time.c @@ -15,6 +15,7 @@ #include #include #include +#include /* * Register definitions for the timers @@ -62,6 +63,11 @@ static unsigned int tick_rate; +static u64 notrace gemini_read_sched_clock(void) +{ + return readl(TIMER_COUNT(TIMER3_BASE)); +} + static int gemini_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) { @@ -206,8 +212,21 @@ void __init gemini_timer_init(void) writel(TIMER_DEFAULT_FLAGS, TIMER_CR); /* - * Setup clockevent timer (interrupt-driven.) + * Setup free-running clocksource timer (interrupts + * disabled.) */ + writel(0, TIMER_COUNT(TIMER3_BASE)); + writel(0, TIMER_LOAD(TIMER3_BASE)); + writel(0, TIMER_MATCH1(TIMER3_BASE)); + writel(0, TIMER_MATCH2(TIMER3_BASE)); + clocksource_mmio_init(TIMER_COUNT(TIMER3_BASE), + "gemini_clocksource", tick_rate, + 300, 32, clocksource_mmio_readl_up); + sched_clock_register(gemini_read_sched_clock, 32, tick_rate); + + /* + * Setup clockevent timer (interrupt-driven.) + */ writel(0, TIMER_COUNT(TIMER1_BASE)); writel(0, TIMER_LOAD(TIMER1_BASE)); writel(0, TIMER_MATCH1(TIMER1_BASE)); -- 2.4.6