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Thu, 19 Sep 2024 02:23:39 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 48J2Ncl0005335 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 19 Sep 2024 02:23:38 GMT Received: from [10.231.207.28] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 18 Sep 2024 19:23:32 -0700 Message-ID: <14392fbf-9bf6-4e39-8ba2-59473351a64b@quicinc.com> Date: Thu, 19 Sep 2024 10:23:29 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: sa8775p: pmic: enable rtc To: Krzysztof Kozlowski , , , , , CC: , , , , , , , References: <20240902104302.3959670-1-quic_tingguoc@quicinc.com> Content-Language: en-US From: Tingguo Cheng In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: iNwH0FpVW8GkSFr2muJ26Md8I0t-mLr9 X-Proofpoint-ORIG-GUID: iNwH0FpVW8GkSFr2muJ26Md8I0t-mLr9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 suspectscore=0 mlxscore=0 clxscore=1011 lowpriorityscore=0 malwarescore=0 phishscore=0 impostorscore=0 mlxlogscore=930 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409190015 On 9/6/2024 8:22 PM, Krzysztof Kozlowski wrote: > On 02/09/2024 12:43, Tingguo Cheng wrote: >> Add RTC node, the RTC is controlled by PMIC device via spmi bus. >> >> Signed-off-by: Tingguo Cheng >> --- >> arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi >> index 1369c3d43f86..47d05b897d5a 100644 >> --- a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi > > We achieved consensus allowing sa8775p to stay, but now Qualcomm changes > point of view and insists on new approach of dropping sa8775p. Therefore > this change does not make much sense in the new approach. > The new approach(QCS9100+sa8775p compatible) will still use the same PMIC chip(As usually, include sa8775p-pmics.dtsi as it's pmic part). Therefore, from this point, it does make sense in the new approach. From another point, for old boards, this change should have been there. > Best regards, > Krzysztof > -- Thank you & BRs Tingguo