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From: Matt Redfearn <matt.redfearn@imgtec.com>
To: <lee.jones@linaro.org>, <sameo@linux.intel.com>, <lars@metafoo.de>
Cc: <linux-kernel@vger.kernel.org>, <matt.redfearn@imgtec.com>
Subject: [PATCH] mfd: jz4740-adc: Init mask cache in generic IRQ chip
Date: Thu, 20 Aug 2015 11:30:32 +0100	[thread overview]
Message-ID: <1440066632-5223-1-git-send-email-matt.redfearn@imgtec.com> (raw)

The mask cache must be initialised in the generic IRQ chip,
otherwise enabling one channel will actually enable all
channels when the empty mask cache is written.

Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
---
 drivers/mfd/jz4740-adc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c
index ae2ad8ad0e2f..e8699c0cdae6 100644
--- a/drivers/mfd/jz4740-adc.c
+++ b/drivers/mfd/jz4740-adc.c
@@ -276,7 +276,8 @@ static int jz4740_adc_probe(struct platform_device *pdev)
 	ct->chip.irq_unmask = irq_gc_mask_clr_bit;
 	ct->chip.irq_ack = irq_gc_ack_set_bit;
 
-	irq_setup_generic_chip(gc, IRQ_MSK(5), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);
+	irq_setup_generic_chip(gc, IRQ_MSK(5), IRQ_GC_INIT_MASK_CACHE, 0,
+				IRQ_NOPROBE | IRQ_LEVEL);
 
 	adc->gc = gc;
 
-- 
2.1.4


             reply	other threads:[~2015-08-20 10:30 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-20 10:30 Matt Redfearn [this message]
2015-08-24 14:01 ` Lee Jones

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