From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753411AbbH0PHK (ORCPT ); Thu, 27 Aug 2015 11:07:10 -0400 Received: from mga02.intel.com ([134.134.136.20]:19045 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752467AbbH0PHI (ORCPT ); Thu, 27 Aug 2015 11:07:08 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,422,1437462000"; d="scan'208";a="792113262" From: Alexander Shishkin To: Peter Zijlstra Cc: Ingo Molnar , linux-kernel@vger.kernel.org, Arnaldo Carvalho de Melo , Alexander Shishkin Subject: [PATCH] perf/x86/intel/pt: Export cpu frequency ratios needed by PT decoders Date: Thu, 27 Aug 2015 18:06:26 +0300 Message-Id: <1440687986-27246-1-git-send-email-alexander.shishkin@linux.intel.com> X-Mailer: git-send-email 2.5.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In order for Intel PT decoders to infer correct crystal clock and bus frequencies that are required to correctly decode timing information from a PT stream (MTC and CBR packets), export them as sysfs attributes: * max_nonturbo_ratio: ratio between the invariant TSC and base clock; * tsc_art_ratio: TSC to core crystal clock ratio. Signed-off-by: Alexander Shishkin --- arch/x86/kernel/cpu/perf_event_intel_pt.c | 40 +++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/x86/kernel/cpu/perf_event_intel_pt.c b/arch/x86/kernel/cpu/perf_event_intel_pt.c index c534261068..e76aa5a30c 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_pt.c +++ b/arch/x86/kernel/cpu/perf_event_intel_pt.c @@ -126,9 +126,49 @@ static struct attribute_group pt_format_group = { .attrs = pt_formats_attr, }; +static ssize_t +pt_timing_attr_show(struct device *dev, struct device_attribute *attr, + char *page) +{ + struct perf_pmu_events_attr *pmu_attr = + container_of(attr, struct perf_pmu_events_attr, attr); + u32 eax, ebx, ecx, edx; + unsigned long val; + + switch (pmu_attr->id) { + case 0: + rdmsrl(MSR_PLATFORM_INFO, val); + val = (val & 0xff00) >> 8; + return sprintf(page, "%lu\n", val); + case 1: + cpuid(0x15, &eax, &ebx, &ecx, &edx); + return sprintf(page, "%u:%u\n", ebx, eax); + default: + break; + } + + return -EINVAL; +} + +PMU_EVENT_ATTR(max_nonturbo_ratio, timing_attr_max_nonturbo_ratio, 0, + pt_timing_attr_show); +PMU_EVENT_ATTR(tsc_art_ratio, timing_attr_tsc_art_ratio, 1, + pt_timing_attr_show); + +static struct attribute *pt_timing_attr[] = { + &timing_attr_max_nonturbo_ratio.attr.attr, + &timing_attr_tsc_art_ratio.attr.attr, + NULL, +}; + +static struct attribute_group pt_timing_group = { + .attrs = pt_timing_attr, +}; + static const struct attribute_group *pt_attr_groups[] = { &pt_cap_group, &pt_format_group, + &pt_timing_group, NULL, }; -- 2.5.0