[PATCH v3 17/17] staging: sm750fb: ddk750_*i2c: shorten lines to under 80 characters

[Mike Rapoport <mike.rapoport@gmail.com>]

Fix some checkpatch warnings about long lines

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
---
 drivers/staging/sm750fb/ddk750_hwi2c.c | 19 ++++++++++++++-----
 drivers/staging/sm750fb/ddk750_hwi2c.h |  3 ++-
 drivers/staging/sm750fb/ddk750_swi2c.c | 22 ++++++++++++++++------
 3 files changed, 32 insertions(+), 12 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_hwi2c.c b/drivers/staging/sm750fb/ddk750_hwi2c.c
index 34b687b..7be2111 100644
--- a/drivers/staging/sm750fb/ddk750_hwi2c.c
+++ b/drivers/staging/sm750fb/ddk750_hwi2c.c
@@ -63,7 +63,8 @@ static long hw_i2c_wait_tx_done(void)
 
 	/* Wait until the transfer is completed. */
 	timeout = HWI2C_WAIT_TIMEOUT;
-	while ((FIELD_GET(PEEK32(I2C_STATUS), I2C_STATUS, TX) != I2C_STATUS_TX_COMPLETED) &&
+	while ((FIELD_GET(PEEK32(I2C_STATUS),
+			  I2C_STATUS, TX) != I2C_STATUS_TX_COMPLETED) &&
 	       (timeout != 0))
 		timeout--;
 
@@ -102,7 +103,10 @@ static unsigned int hw_i2c_write_data(
 	 *      Only 16 byte can be accessed per i2c start instruction.
 	 */
 	do {
-		/* Reset I2C by writing 0 to I2C_RESET register to clear the previous status. */
+		/*
+		 * Reset I2C by writing 0 to I2C_RESET register to
+		 * clear the previous status.
+		 */
 		POKE32(I2C_RESET, 0);
 
 		/* Set the number of bytes to be written */
@@ -117,7 +121,8 @@ static unsigned int hw_i2c_write_data(
 			POKE32(I2C_DATA0 + i, *buf++);
 
 		/* Start the I2C */
-		POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
+		POKE32(I2C_CTRL,
+		       FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
 
 		/* Wait until the transfer is completed. */
 		if (hw_i2c_wait_tx_done() != 0)
@@ -165,7 +170,10 @@ static unsigned int hw_i2c_read_data(
 	 *      Only 16 byte can be accessed per i2c start instruction.
 	 */
 	do {
-		/* Reset I2C by writing 0 to I2C_RESET register to clear all the status. */
+		/*
+		 * Reset I2C by writing 0 to I2C_RESET register to
+		 * clear all the status.
+		 */
 		POKE32(I2C_RESET, 0);
 
 		/* Set the number of bytes to be read */
@@ -176,7 +184,8 @@ static unsigned int hw_i2c_read_data(
 		POKE32(I2C_BYTE_COUNT, count);
 
 		/* Start the I2C */
-		POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
+		POKE32(I2C_CTRL,
+		       FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
 
 		/* Wait until transaction done. */
 		if (hw_i2c_wait_tx_done() != 0)
diff --git a/drivers/staging/sm750fb/ddk750_hwi2c.h b/drivers/staging/sm750fb/ddk750_hwi2c.h
index 2827865..46e22dc 100644
--- a/drivers/staging/sm750fb/ddk750_hwi2c.h
+++ b/drivers/staging/sm750fb/ddk750_hwi2c.h
@@ -6,5 +6,6 @@ int sm750_hw_i2c_init(unsigned char bus_speed_mode);
 void sm750_hw_i2c_close(void);
 
 unsigned char sm750_hw_i2c_read_reg(unsigned char addr, unsigned char reg);
-int sm750_hw_i2c_write_reg(unsigned char addr, unsigned char reg, unsigned char data);
+int sm750_hw_i2c_write_reg(unsigned char addr, unsigned char reg,
+			   unsigned char data);
 #endif
diff --git a/drivers/staging/sm750fb/ddk750_swi2c.c b/drivers/staging/sm750fb/ddk750_swi2c.c
index ddbbeff..37cdd5b 100644
--- a/drivers/staging/sm750fb/ddk750_swi2c.c
+++ b/drivers/staging/sm750fb/ddk750_swi2c.c
@@ -125,7 +125,10 @@ static void sw_i2c_scl(unsigned char value)
 
 	gpio_dir = PEEK32(sw_i2c_clk_gpio_data_dir_reg);
 	if (value) {    /* High */
-		/* Set direction as input. This will automatically pull the signal up. */
+		/*
+		 * Set direction as input. This will automatically
+		 * pull the signal up.
+		 */
 		gpio_dir &= ~(1 << sw_i2c_clk_gpio);
 		POKE32(sw_i2c_clk_gpio_data_dir_reg, gpio_dir);
 	} else {        /* Low */
@@ -159,7 +162,10 @@ static void sw_i2c_sda(unsigned char value)
 
 	gpio_dir = PEEK32(sw_i2c_data_gpio_data_dir_reg);
 	if (value) {    /* High */
-		/* Set direction as input. This will automatically pull the signal up. */
+		/*
+		 * Set direction as input. This will automatically
+		 * pull the signal up.
+		 */
 		gpio_dir &= ~(1 << sw_i2c_data_gpio);
 		POKE32(sw_i2c_data_gpio_data_dir_reg, gpio_dir);
 	} else {        /* Low */
@@ -184,10 +190,11 @@ static unsigned char sw_i2c_read_sda(void)
 {
 	unsigned long gpio_dir;
 	unsigned long gpio_data;
+	unsigned long dir_mask = 1 << sw_i2c_data_gpio;
 
 	/* Make sure that the direction is input (High) */
 	gpio_dir = PEEK32(sw_i2c_data_gpio_data_dir_reg);
-	if ((gpio_dir & (1 << sw_i2c_data_gpio)) != (~(1 << sw_i2c_data_gpio))) {
+	if ((gpio_dir & dir_mask) != ~dir_mask) {
 		gpio_dir &= ~(1 << sw_i2c_data_gpio);
 		POKE32(sw_i2c_data_gpio_data_dir_reg, gpio_dir);
 	}
@@ -392,7 +399,10 @@ long sm750_sw_i2c_init(
 {
 	int i;
 
-	/* Return 0 if the GPIO pins to be used is out of range. The range is only from [0..63] */
+	/*
+	 * Return 0 if the GPIO pins to be used is out of range. The
+	 * range is only from [0..63]
+	 */
 	if ((clk_gpio > 31) || (data_gpio > 31))
 		return -1;
 
@@ -417,9 +427,9 @@ long sm750_sw_i2c_init(
 
 	/* Enable the GPIO pins for the i2c Clock and Data (GPIO MUX) */
 	POKE32(sw_i2c_clk_gpio_mux_reg,
-			PEEK32(sw_i2c_clk_gpio_mux_reg) & ~(1 << sw_i2c_clk_gpio));
+	       PEEK32(sw_i2c_clk_gpio_mux_reg) & ~(1 << sw_i2c_clk_gpio));
 	POKE32(sw_i2c_data_gpio_mux_reg,
-			PEEK32(sw_i2c_data_gpio_mux_reg) & ~(1 << sw_i2c_data_gpio));
+	       PEEK32(sw_i2c_data_gpio_mux_reg) & ~(1 << sw_i2c_data_gpio));
 
 	/* Enable GPIO power */
 	enableGPIO(1);
-- 
2.1.0