From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754145AbbIGI3T (ORCPT ); Mon, 7 Sep 2015 04:29:19 -0400 Received: from mail-by2on0133.outbound.protection.outlook.com ([207.46.100.133]:42432 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754066AbbIGI3J (ORCPT ); Mon, 7 Sep 2015 04:29:09 -0400 Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=freescale.com; freescale.mail.onmicrosoft.com; dkim=none (message not signed) header.d=none;freescale.mail.onmicrosoft.com; dmarc=none action=none header.from=freescale.com; From: To: CC: , , , , Tang Yuantian Subject: [PATCH 2/3] devicetree:bindings: add devicetree bindings for Freescale AHCI Date: Mon, 7 Sep 2015 16:23:15 +0800 Message-ID: <1441614196-4284-2-git-send-email-Yuantian.Tang@freescale.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1441614196-4284-1-git-send-email-Yuantian.Tang@freescale.com> References: <1441614196-4284-1-git-send-email-Yuantian.Tang@freescale.com> X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BL2FFO11FD042;1:lazt++5JOqvMF2MgxbpvQkw/l2nVVNQ6vx4PzpMKObjGyBGMs+roTQ2dxvk8D9DUYwbuLrmwerE6Gzv9Z7RaNZTtjZ6gPT/qC1MnEM2RG0jlVCyLfQdRtxabxpiQTMIBZeyj7zUP2sMqrfvYTKnZ2LClFuPuGszWu3RHibJiQr9jJhmdp/lu3oSAYD2e+ZjxBZIJt4ygCUO2Bm0VwsRqs9i0gfyFgmx+d1v9W3d0CgUPc1a1WAbZNFuJ6j+KE7bVKfY4Y+TxUzibETGdoU6FMnVOhRjvW+mdMgdkIrE87pDN7TekLIJN2YCEOgFGJeWQ0dAyVAP8thLwsVwZGML9frP9uZrPbNGD4zYmqXDQE6K7Ldz9JQBeEpcEM7SHOsPiTmhrPcR2ukhuQ/Vz1WB+WQ== X-Forefront-Antispam-Report: CIP:192.88.158.2;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(2980300002)(1109001)(339900001)(199003)(189002)(76176999)(86362001)(77156002)(19580395003)(81156007)(105606002)(36756003)(85426001)(50986999)(69596002)(48376002)(189998001)(5003940100001)(86152002)(6806004)(19580405001)(5007970100001)(87936001)(50226001)(77096005)(5001860100001)(106466001)(50466002)(4001540100001)(62966003)(47776003)(5001960100002)(5001920100001)(64706001)(2950100001)(5001830100001)(110136002)(2351001)(107886002)(68736005)(92566002)(229853001)(46102003)(104016003)(97736004)(4001430100001);DIR:OUT;SFP:1102;SCL:1;SRVR:DM2PR03MB576;H:az84smr01.freescale.net;FPR:;SPF:Fail;PTR:InfoDomainNonexistent;A:1;MX:1;LANG:en; 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Signed-off-by: Tang Yuantian --- .../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt new file mode 100644 index 0000000..b614e3b --- /dev/null +++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt @@ -0,0 +1,21 @@ +Binding for Freescale QorIQ AHCI SATA Controller + +Required properties: + - reg: Physical base address and size of the controller's register area. + - compatible: Compatibility string. Must be 'fsl,-ahci', where + chip could be ls1021a, ls2085a, ls1043a etc. + - clocks: Input clock specifier. Refer to common clock bindings. + - interrupts: Interrupt specifier. Refer to interrupt binding. + +Optional properties: + - dma-coherent: Enable ACHI coherency DMA operation. + - reg-names: register area names when there are more then 1 regster area. + +Examples: + sata@3200000 { + compatible = "fsl,ls1021a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>; + interrupts = ; + clocks = <&platform_clk 1>; + dma-coherent; + }; -- 2.1.0.27.g96db324