From: Vikas Shivappa <vikas.shivappa@linux.intel.com>
To: vikas.shivappa@intel.com
Cc: vikas.shivappa@linux.intel.com, x86@kernel.org,
linux-kernel@vger.kernel.org, hpa@zytor.com, tglx@linutronix.de,
mingo@kernel.org, tj@kernel.org, peterz@infradead.org,
matt.fleming@intel.com, will.auld@intel.com,
h.peter.anvin@intel.com, glenn.p.williamson@intel.com,
kanaka.d.juvva@intel.com, bruce.schlobohm@intel.com
Subject: [PATCH 05/11] x86/intel_rdt: Add Class of service management
Date: Wed, 9 Sep 2015 12:24:56 -0700 [thread overview]
Message-ID: <1441826702-6975-6-git-send-email-vikas.shivappa@linux.intel.com> (raw)
In-Reply-To: <1441826702-6975-1-git-send-email-vikas.shivappa@linux.intel.com>
Adds some data-structures and APIs to support Class of service
management(closid). There is a new clos_cbm table which keeps a 1:1
mapping between closid and capacity bit mask (cbm)
and a count of usage of closid. Each task would be associated with a
Closid at a time and this patch adds a new field closid to task_struct
to keep track of the same.
Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>
---
arch/x86/include/asm/intel_rdt.h | 12 ++++++
arch/x86/kernel/cpu/intel_rdt.c | 85 +++++++++++++++++++++++++++++++++++++++-
include/linux/sched.h | 3 ++
3 files changed, 98 insertions(+), 2 deletions(-)
create mode 100644 arch/x86/include/asm/intel_rdt.h
diff --git a/arch/x86/include/asm/intel_rdt.h b/arch/x86/include/asm/intel_rdt.h
new file mode 100644
index 0000000..88b7643
--- /dev/null
+++ b/arch/x86/include/asm/intel_rdt.h
@@ -0,0 +1,12 @@
+#ifndef _RDT_H_
+#define _RDT_H_
+
+#ifdef CONFIG_INTEL_RDT
+
+struct clos_cbm_table {
+ unsigned long l3_cbm;
+ unsigned int clos_refcnt;
+};
+
+#endif
+#endif
diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c
index f49e970..cc988b1 100644
--- a/arch/x86/kernel/cpu/intel_rdt.c
+++ b/arch/x86/kernel/cpu/intel_rdt.c
@@ -24,17 +24,98 @@
#include <linux/slab.h>
#include <linux/err.h>
+#include <asm/intel_rdt.h>
+
+/*
+ * cctable maintains 1:1 mapping between CLOSid and cache bitmask.
+ */
+static struct clos_cbm_table *cctable;
+/*
+ * closid availability bit map.
+ */
+unsigned long *closmap;
+static DEFINE_MUTEX(rdt_group_mutex);
+
+static inline void closid_get(u32 closid)
+{
+ struct clos_cbm_table *cct = &cctable[closid];
+
+ lockdep_assert_held(&rdt_group_mutex);
+
+ cct->clos_refcnt++;
+}
+
+static int closid_alloc(u32 *closid)
+{
+ u32 maxid;
+ u32 id;
+
+ lockdep_assert_held(&rdt_group_mutex);
+
+ maxid = boot_cpu_data.x86_cache_max_closid;
+ id = find_first_zero_bit(closmap, maxid);
+ if (id == maxid)
+ return -ENOSPC;
+
+ set_bit(id, closmap);
+ closid_get(id);
+ *closid = id;
+
+ return 0;
+}
+
+static inline void closid_free(u32 closid)
+{
+ clear_bit(closid, closmap);
+ cctable[closid].l3_cbm = 0;
+}
+
+static void closid_put(u32 closid)
+{
+ struct clos_cbm_table *cct = &cctable[closid];
+
+ lockdep_assert_held(&rdt_group_mutex);
+ if (WARN_ON(!cct->clos_refcnt))
+ return;
+
+ if (!--cct->clos_refcnt)
+ closid_free(closid);
+}
static int __init intel_rdt_late_init(void)
{
struct cpuinfo_x86 *c = &boot_cpu_data;
+ u32 maxid, max_cbm_len;
+ int err = 0, size, i;
if (!cpu_has(c, X86_FEATURE_CAT_L3))
return -ENODEV;
- pr_info("Intel cache allocation detected\n");
+ maxid = c->x86_cache_max_closid;
+ max_cbm_len = c->x86_cache_max_cbm_len;
- return 0;
+ size = maxid * sizeof(struct clos_cbm_table);
+ cctable = kzalloc(size, GFP_KERNEL);
+ if (!cctable) {
+ err = -ENOMEM;
+ goto out_err;
+ }
+
+ for (i = 0; i < maxid; i++)
+ cctable[i].l3_cbm = (1ULL << max_cbm_len) - 1;
+
+ size = BITS_TO_LONGS(maxid) * sizeof(long);
+ closmap = kzalloc(size, GFP_KERNEL);
+ if (!closmap) {
+ kfree(cctable);
+ err = -ENOMEM;
+ goto out_err;
+ }
+
+ pr_info("Intel cache allocation enabled\n");
+out_err:
+
+ return err;
}
late_initcall(intel_rdt_late_init);
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 04b5ada..b1b5bf7 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1636,6 +1636,9 @@ struct task_struct {
/* cg_list protected by css_set_lock and tsk->alloc_lock */
struct list_head cg_list;
#endif
+#ifdef CONFIG_INTEL_RDT
+ u32 closid;
+#endif
#ifdef CONFIG_FUTEX
struct robust_list_head __user *robust_list;
#ifdef CONFIG_COMPAT
--
1.9.1
next prev parent reply other threads:[~2015-09-09 19:25 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-09 19:24 [PATCH V14 0/9] Intel cache allocation and Hot cpu handling changes to cqm, rapl Vikas Shivappa
2015-09-09 19:24 ` [PATCH 01/11] x86/intel_cqm: Modify hot cpu notification handling Vikas Shivappa
2015-09-09 19:24 ` [PATCH 02/11] x86/intel_rapl: " Vikas Shivappa
2015-09-09 19:24 ` [PATCH 03/11] x86/intel_rdt: Cache Allocation documentation Vikas Shivappa
2015-09-09 19:24 ` [PATCH 04/11] x86/intel_rdt: Add support for Cache Allocation detection Vikas Shivappa
2015-09-09 19:24 ` Vikas Shivappa [this message]
2015-09-09 19:24 ` [PATCH 06/11] x86/intel_rdt: Add L3 cache capacity bitmask management Vikas Shivappa
2015-09-09 19:24 ` [PATCH 07/11] x86/intel_rdt: Implement scheduling support for Intel RDT Vikas Shivappa
2015-09-09 19:24 ` [PATCH 08/11] x86/intel_rdt: Hot cpu support for Cache Allocation Vikas Shivappa
2015-09-09 19:25 ` [PATCH 09/11] x86/intel_rdt: Intel haswell Cache Allocation enumeration Vikas Shivappa
2015-09-09 19:25 ` [PATCH 10/11] x86,cgroup/intel_rdt : Add intel_rdt cgroup documentation Vikas Shivappa
2015-09-09 19:25 ` [PATCH 11/11] x86,cgroup/intel_rdt : Add a cgroup interface to manage Intel cache allocation Vikas Shivappa
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