From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753335AbbIJGGp (ORCPT ); Thu, 10 Sep 2015 02:06:45 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:56945 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751109AbbIJGGg (ORCPT ); Thu, 10 Sep 2015 02:06:36 -0400 From: Chen Feng To: , , CC: , , , , Subject: [PATCH 1/3] arm64: dts: Add reset dts config for Hisilicon Hi6220 SoC Date: Thu, 10 Sep 2015 14:06:11 +0800 Message-ID: <1441865173-104103-1-git-send-email-puck.chen@hisilicon.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.141.105.115] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add reset controller for hi6220 hikey-board. Signed-off-by: Chen Feng --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 3f03380..09bb9d1 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -167,5 +167,12 @@ clocks = <&ao_ctrl 36>, <&ao_ctrl 36>; clock-names = "uartclk", "apb_pclk"; }; + + reset_ctrl: reset_ctrl@f7030304 { + compatible = "hisilicon,hisi_reset_ctl"; + reg = <0x0 0xf7030304 0x0 0x1000>; + #reset-cells = <1>; + }; + }; }; -- 1.9.1