From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754184AbbIOPoj (ORCPT ); Tue, 15 Sep 2015 11:44:39 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([146.101.78.143]:39582 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753373AbbIOPlo (ORCPT ); Tue, 15 Sep 2015 11:41:44 -0400 From: "Suzuki K. Poulose" To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Catalin.Marinas@arm.com, Will.Deacon@arm.com, Mark.Rutland@arm.com, Marc.Zyngier@arm.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, ard.biesheuvel@linaro.org, suzuki.poulose@arm.com, Christoffer Dall , Marc Zyngier Subject: [PATCH 11/15] arm64: Cleanup VTCR_EL2 computation Date: Tue, 15 Sep 2015 16:41:20 +0100 Message-Id: <1442331684-28818-12-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1442331684-28818-1-git-send-email-suzuki.poulose@arm.com> References: <1442331684-28818-1-git-send-email-suzuki.poulose@arm.com> X-OriginalArrivalTime: 15 Sep 2015 15:41:41.0140 (UTC) FILETIME=[04310540:01D0EFCD] X-MC-Unique: IsD4nPSlRz6fV4W7SZf2pw-7 Content-Type: text/plain; charset=WINDOWS-1252 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id t8FFivg8027962 From: "Suzuki K. Poulose" No functional changes. Group the common bits for VCTR_EL2 initialisation for better readability. The granule size and the entry level are controlled by the page size. Cc: Christoffer Dall Cc: Marc Zyngier Cc: kvmarm@lists.cs.columbia.edu Signed-off-by: Suzuki K. Poulose --- arch/arm64/include/asm/kvm_arm.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index bdf139e..699554d 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -138,6 +138,9 @@ * The magic numbers used for VTTBR_X in this patch can be found in Tables * D4-23 and D4-25 in ARM DDI 0487A.b. */ +#define VTCR_EL2_COMMON_BITS (VTCR_EL2_SH0_INNER | VTCR_EL2_ORGN0_WBWA | \ + VTCR_EL2_IRGN0_WBWA | VTCR_EL2_T0SZ_40B) + #ifdef CONFIG_ARM64_64K_PAGES /* * Stage2 translation configuration: @@ -145,9 +148,8 @@ * 64kB pages (TG0 = 1) * 2 level page tables (SL = 1) */ -#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SH0_INNER | \ - VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ - VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) +#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_64K | VTCR_EL2_SL0_LVL1 | \ + VTCR_EL2_COMMON_BITS) #define VTTBR_X (38 - VTCR_EL2_T0SZ_40B) #else /* @@ -156,9 +158,8 @@ * 4kB pages (TG0 = 0) * 3 level page tables (SL = 1) */ -#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SH0_INNER | \ - VTCR_EL2_ORGN0_WBWA | VTCR_EL2_IRGN0_WBWA | \ - VTCR_EL2_SL0_LVL1 | VTCR_EL2_T0SZ_40B) +#define VTCR_EL2_FLAGS (VTCR_EL2_TG0_4K | VTCR_EL2_SL0_LVL1 | \ + VTCR_EL2_COMMON_BITS) #define VTTBR_X (37 - VTCR_EL2_T0SZ_40B) #endif -- 1.7.9.5