From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754468AbbIPOYo (ORCPT ); Wed, 16 Sep 2015 10:24:44 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([146.101.78.143]:15722 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754119AbbIPOXK (ORCPT ); Wed, 16 Sep 2015 10:23:10 -0400 From: "Suzuki K. Poulose" To: linux-arm-kernel@lists.infradead.org Cc: Catalin.Marinas@arm.com, Will.Deacon@arm.com, Mark.Rutland@arm.com, edward.nevill@linaro.org, aph@redhat.com, linux-kernel@vger.kernel.org, andre.przywara@arm.com, ard.biesheuvel@linaro.org, dave.martin@arm.com, marc.zyngier@arm.com, "Suzuki K. Poulose" Subject: [PATCH 16/22] arm64/debug: Make use of the system wide safe value Date: Wed, 16 Sep 2015 15:21:14 +0100 Message-Id: <1442413280-31885-17-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1442413280-31885-1-git-send-email-suzuki.poulose@arm.com> References: <1442413280-31885-1-git-send-email-suzuki.poulose@arm.com> X-OriginalArrivalTime: 16 Sep 2015 14:23:05.0209 (UTC) FILETIME=[33B0CE90:01D0F08B] X-MC-Unique: J31U-K9TQOGYwL930LfVwQ-11 Content-Type: text/plain; charset=WINDOWS-1252 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id t8GEQ3d6002566 From: "Suzuki K. Poulose" Use the system wide value of ID_AA64DFR0 to make safer decisions Signed-off-by: Suzuki K. Poulose --- arch/arm64/include/asm/hw_breakpoint.h | 14 ++------------ arch/arm64/kernel/debug-monitors.c | 6 ++++-- arch/arm64/kernel/hw_breakpoint.c | 19 ++++++++++++++++++- 3 files changed, 24 insertions(+), 15 deletions(-) diff --git a/arch/arm64/include/asm/hw_breakpoint.h b/arch/arm64/include/asm/hw_breakpoint.h index 4c47cb2..0251768 100644 --- a/arch/arm64/include/asm/hw_breakpoint.h +++ b/arch/arm64/include/asm/hw_breakpoint.h @@ -119,6 +119,8 @@ extern int arch_install_hw_breakpoint(struct perf_event *bp); extern void arch_uninstall_hw_breakpoint(struct perf_event *bp); extern void hw_breakpoint_pmu_read(struct perf_event *bp); extern int hw_breakpoint_slots(int type); +extern int get_num_brps(void); +extern int get_num_wrps(void); #ifdef CONFIG_HAVE_HW_BREAKPOINT extern void hw_breakpoint_thread_switch(struct task_struct *next); @@ -134,17 +136,5 @@ static inline void ptrace_hw_copy_thread(struct task_struct *task) extern struct pmu perf_ops_bp; -/* Determine number of BRP registers available. */ -static inline int get_num_brps(void) -{ - return ((read_cpuid(ID_AA64DFR0_EL1) >> 12) & 0xf) + 1; -} - -/* Determine number of WRP registers available. */ -static inline int get_num_wrps(void) -{ - return ((read_cpuid(ID_AA64DFR0_EL1) >> 20) & 0xf) + 1; -} - #endif /* __KERNEL__ */ #endif /* __ASM_BREAKPOINT_H */ diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c index 9b3b62a..9ca5f77 100644 --- a/arch/arm64/kernel/debug-monitors.c +++ b/arch/arm64/kernel/debug-monitors.c @@ -26,14 +26,16 @@ #include #include -#include +#include #include +#include #include /* Determine debug architecture. */ u8 debug_monitors_arch(void) { - return read_cpuid(ID_AA64DFR0_EL1) & 0xf; + return cpuid_feature_extract_field(read_system_reg(SYS_ID_AA64DFR0_EL1), + ID_AA64DFR0_DEBUGVER_SHIFT); } /* diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c index c97040e..1fa0476 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c @@ -28,11 +28,12 @@ #include #include +#include +#include #include #include #include #include -#include #include /* Breakpoint currently in use for each BRP. */ @@ -48,6 +49,22 @@ static DEFINE_PER_CPU(int, stepping_kernel_bp); static int core_num_brps; static int core_num_wrps; +/* Determine number of BRP registers available. */ +int get_num_brps(void) +{ + return 1 + + cpuid_feature_extract_field(read_system_reg(SYS_ID_AA64DFR0_EL1), + ID_AA64DFR0_BRPS_SHIFT); +} + +/* Determine number of WRP registers available. */ +int get_num_wrps(void) +{ + return 1 + + cpuid_feature_extract_field(read_system_reg(SYS_ID_AA64DFR0_EL1), + ID_AA64DFR0_WRPS_SHIFT); +} + int hw_breakpoint_slots(int type) { /* -- 1.7.9.5