From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754801AbbIRQd1 (ORCPT ); Fri, 18 Sep 2015 12:33:27 -0400 Received: from mail-pa0-f42.google.com ([209.85.220.42]:33437 "EHLO mail-pa0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754607AbbIRQ1J (ORCPT ); Fri, 18 Sep 2015 12:27:09 -0400 From: Mathieu Poirier To: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl, alexander.shishkin@linux.intel.com, acme@kernel.org, mingo@redhat.com, corbet@lwn.net Cc: adrian.hunter@intel.com, zhang.chunyan@linaro.org, mike.leach@arm.com, tor@ti.com, al.grant@arm.com, pawel.moll@arm.com, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 03/20] coresight: etm3x: implementing 'cpu_id()' API Date: Fri, 18 Sep 2015 10:26:17 -0600 Message-Id: <1442593594-10665-4-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1442593594-10665-1-git-send-email-mathieu.poirier@linaro.org> References: <1442593594-10665-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Adding an interface to lookup the CPU a tracer has been affined to along with a source operation allowing external customers to access it. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 14 ++++++++++++++ include/linux/coresight.h | 3 +++ 2 files changed, 17 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index a44bc3532585..4ce9cfc06e93 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -441,6 +441,19 @@ static void etm_config_enable(void *info) spin_unlock(&drvdata->spinlock); } +static int etm_cpu_id(struct coresight_device *csdev) +{ + int cpu; + unsigned long flags; + struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + spin_lock_irqsave(&drvdata->spinlock, flags); + cpu = drvdata->cpu; + spin_unlock_irqrestore(&drvdata->spinlock, flags); + + return cpu; +} + static int etm_trace_id(struct coresight_device *csdev) { struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -536,6 +549,7 @@ static void etm_disable(struct coresight_device *csdev) } static const struct coresight_ops_source etm_source_ops = { + .cpu_id = etm_cpu_id, .trace_id = etm_trace_id, .is_enabled = etm_is_enabled, .configure = etm_configure, diff --git a/include/linux/coresight.h b/include/linux/coresight.h index d16e874079b7..9fe2ccf1cc36 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -205,6 +205,8 @@ struct coresight_ops_link { /** * struct coresight_ops_source - basic operations for a source * Operations available for sources. + * @cpu_id: returns the value of the CPU number this component + * is associated to. * @trace_id: returns the value of the component's trace ID as known * to the HW. * @is_enabled: returns whether a source has been enabled or not. @@ -216,6 +218,7 @@ struct coresight_ops_link { * @poweroff: switch off power to a source. */ struct coresight_ops_source { + int (*cpu_id)(struct coresight_device *csdev); int (*trace_id)(struct coresight_device *csdev); bool (*is_enabled)(struct coresight_device *csdev); int (*configure)(struct coresight_device *csdev); -- 1.9.1