From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932351AbbIVLcY (ORCPT ); Tue, 22 Sep 2015 07:32:24 -0400 Received: from mail-la0-f41.google.com ([209.85.215.41]:35422 "EHLO mail-la0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753339AbbIVLcW (ORCPT ); Tue, 22 Sep 2015 07:32:22 -0400 From: Max Filippov To: linux-spi@vger.kernel.org Cc: Mark Brown , linux-xtensa@linux-xtensa.org, linux-kernel@vger.kernel.org, Max Filippov Subject: [PATCH] spi: xtensa-xtfpga: fix register endianness Date: Tue, 22 Sep 2015 14:32:03 +0300 Message-Id: <1442921523-1265-1-git-send-email-jcmvbkbc@gmail.com> X-Mailer: git-send-email 1.8.1.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org XTFPGA SPI controller has native endian registers. Fix register acessors so that they work in big-endian configurations. Signed-off-by: Max Filippov --- drivers/spi/spi-xtensa-xtfpga.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-xtensa-xtfpga.c b/drivers/spi/spi-xtensa-xtfpga.c index 2e32ea2..be6155c 100644 --- a/drivers/spi/spi-xtensa-xtfpga.c +++ b/drivers/spi/spi-xtensa-xtfpga.c @@ -34,13 +34,13 @@ struct xtfpga_spi { static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi, unsigned addr, u32 val) { - iowrite32(val, spi->regs + addr); + __raw_writel(val, spi->regs + addr); } static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi, unsigned addr) { - return ioread32(spi->regs + addr); + return __raw_readl(spi->regs + addr); } static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi) -- 1.8.1.4