From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758843AbbIVR2M (ORCPT ); Tue, 22 Sep 2015 13:28:12 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:46719 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758805AbbIVR2J (ORCPT ); Tue, 22 Sep 2015 13:28:09 -0400 From: Paul Burton To: CC: Paul Burton , , James Hogan , Markos Chandras , Ralf Baechle Subject: [PATCH 4/5] MIPS: allow read64 GCR accessors to work on MIPS32 kernels Date: Tue, 22 Sep 2015 10:26:40 -0700 Message-ID: <1442942801-2883-5-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.5.3 In-Reply-To: <1442942801-2883-1-git-send-email-paul.burton@imgtec.com> References: <1442942801-2883-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.159.189] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If we run a MIPS32 kernel on a system using CM3 we may still need to access 64 bit GCRs, as will be done in later patches. Allow this by having the read64_gcr_* accessor functions perform 2 x 32 bit reads on those systems. Signed-off-by: Paul Burton --- arch/mips/include/asm/mips-cm.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h index 2a70b76..b9df4b2 100644 --- a/arch/mips/include/asm/mips-cm.h +++ b/arch/mips/include/asm/mips-cm.h @@ -125,7 +125,17 @@ static inline u32 read32_gcr_##name(void) \ \ static inline u64 read64_gcr_##name(void) \ { \ - return __raw_readq(addr_gcr_##name()); \ + void __iomem *addr = addr_gcr_##name(); \ + u64 ret; \ + \ + if (mips_cm_is64) { \ + ret = __raw_readq(addr); \ + } else { \ + ret = __raw_readl(addr); \ + ret |= (u64)__raw_readl(addr + 0x4) << 32; \ + } \ + \ + return ret; \ } \ \ static inline unsigned long read_gcr_##name(void) \ -- 2.5.3