From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755262AbbI2OkK (ORCPT ); Tue, 29 Sep 2015 10:40:10 -0400 Received: from mail-pa0-f66.google.com ([209.85.220.66]:36417 "EHLO mail-pa0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754681AbbI2Ojp (ORCPT ); Tue, 29 Sep 2015 10:39:45 -0400 From: Robert Bragg To: intel-gfx@lists.freedesktop.org Cc: Daniel Vetter , Chris Wilson , Sourab Gupta , Zhenyu Wang , Jani Nikula , David Airlie , Peter Zijlstra , Ingo Molnar , Kan Liang , Alexander Shishkin , Zheng Yan , Mark Rutland , Matt Fleming , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-api@vger.kernel.org Subject: [RFC 2/6] drm/i915: rename OACONTROL GEN7_OACONTROL Date: Tue, 29 Sep 2015 15:39:05 +0100 Message-Id: <1443537549-6905-3-git-send-email-robert@sixbynine.org> X-Mailer: git-send-email 2.5.2 In-Reply-To: <1443537549-6905-1-git-send-email-robert@sixbynine.org> References: <1443537549-6905-1-git-send-email-robert@sixbynine.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index 237ff68..d769436 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -439,7 +439,7 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = { REG64(CL_PRIMITIVES_COUNT), REG64(PS_INVOCATION_COUNT), REG64(PS_DEPTH_COUNT), - REG32(OACONTROL), /* Only allowed for LRI and SRM. See below. */ + REG32(GEN7_OACONTROL), /* Only allowed for LRI and SRM. See below. */ REG64(MI_PREDICATE_SRC0), REG64(MI_PREDICATE_SRC1), REG32(GEN7_3DPRIM_END_OFFSET), @@ -1020,7 +1020,7 @@ static bool check_cmd(const struct intel_engine_cs *ring, * to the register. Hence, limit OACONTROL writes to * only MI_LOAD_REGISTER_IMM commands. */ - if (reg_addr == OACONTROL) { + if (reg_addr == GEN7_OACONTROL) { if (desc->cmd.value == MI_LOAD_REGISTER_MEM(1)) { DRM_DEBUG_DRIVER("CMD: Rejected LRM to OACONTROL\n"); return false; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1fa0554..2e488e8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -536,7 +536,7 @@ #define GEN7_3DPRIM_START_INSTANCE 0x243C #define GEN7_3DPRIM_BASE_VERTEX 0x2440 -#define OACONTROL 0x2360 +#define GEN7_OACONTROL 0x2360 #define _GEN7_PIPEA_DE_LOAD_SL 0x70068 #define _GEN7_PIPEB_DE_LOAD_SL 0x71068 -- 2.5.2