From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756597AbbJAIWG (ORCPT ); Thu, 1 Oct 2015 04:22:06 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:46436 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756088AbbJAIWA (ORCPT ); Thu, 1 Oct 2015 04:22:00 -0400 X-AuditID: cbfee690-f794e6d0000014de-57-560ced269487 From: Alim Akhtar To: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: JBottomley@odin.com, vinholikatti@gmail.com, amit.daniel@samsung.com, essuuj@gmail.com, devicetree@vger.kernel.org Subject: [PATCH v3 05/13] scsi: ufs: add quirk not to allow reset of interrupt aggregation Date: Thu, 01 Oct 2015 13:39:22 +0530 Message-id: <1443686970-28104-6-git-send-email-alim.akhtar@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1443686970-28104-1-git-send-email-alim.akhtar@samsung.com> References: <1443686970-28104-1-git-send-email-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMLMWRmVeSWpSXmKPExsWyRsSkSlftLU+YwdapahYNV0Ms5h85x2qx /MISJov/62+zWFzeNYfNovv6DjaLHQurHNg9ds66y+5x+McPZo++LasYPT5vkgtgieKySUnN ySxLLdK3S+DKOHqsj7HgPE/Fg+1aDYxHuLoYOTkkBEwkVkxYwAxhi0lcuLeerYuRi0NIYAWj xOXOw+wwRSvnfoVKzGKUeHv2MSuE85NR4trTxYwgVWwC2hJ3p29hArFFBGwkzt98AGYzC1RI 3DozgQXEFhaIkXjVfREsziKgKrGp6RUbiM0r4C6xoO8GG8Q2RYnuZxOAbA4OTgEPiW+LQkHC QkAlH+4uZwTZKyHQzy4xs+EtM8QcAYlvkw+xgNRLCMhKbDoA9Y2kxMEVN1gmMAovYGRYxSia WpBcUJyUXmSiV5yYW1yal66XnJ+7iREY1qf/PZuwg/HeAetDjAIcjEo8vBLpPGFCrIllxZW5 hxhNgTZMZJYSTc4HRk9eSbyhsZmRhamJqbGRuaWZkjjva6mfwUIC6YklqdmpqQWpRfFFpTmp xYcYmTg4pRoYRQ/MnzVXsfiVgMKlnVm5V+SVN5/eFOmzsH5TeRPvm4nZ64y2tX1Wfbdw0dTu NfucP1Yd6riz9ARf4b8JK2pnsExy3bxPh+l5a7GPjeH6yhzFWQv/3X7ibV44ufGAcXKvqGZq yJSmicdf/o4NUF1ieVB6gpa7UcEucekb5nLMx+ryD89v7b/6T4mlOCPRUIu5qDgRAI3ANlZm AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrAIsWRmVeSWpSXmKPExsVy+t9jQV21tzxhBkc2Sls0XA2xmH/kHKvF 8gtLmCz+r7/NYnF51xw2i+7rO9gsdiyscmD32DnrLrvH4R8/mD36tqxi9Pi8SS6AJaqB0SYj NTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfVVsnFJ0DXLTMH6AAlhbLEnFKg UEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8bRY32MBed5Kh5s12pgPMLVxcjJISFg IrFy7lc2CFtM4sK99UA2F4eQwCxGibdnH7NCOD8ZJa49XcwIUsUmoC1xd/oWJhBbRMBG4vzN B2A2s0CFxK0zE1hAbGGBGIlX3RfB4iwCqhKbml6BbeAVcJdY0HcDapuiRPezCUA2BwengIfE t0WhIGEhoJIPd5czTmDkXcDIsIpRIrUguaA4KT3XMC+1XK84Mbe4NC9dLzk/dxMjOHaeSe1g PLjL/RCjAAejEg/vgRSeMCHWxLLiytxDjBIczEoivAfvAYV4UxIrq1KL8uOLSnNSiw8xmgLd NZFZSjQ5HxjXeSXxhsYm5qbGppYmFiZmlkrivDcOMYQJCaQnlqRmp6YWpBbB9DFxcEo1MB58 ecH3Zt037oQ75Re+7Zs86aBM/OEo+TP6Kz4u/fz2c+JTm4v1WRd5RN2F96Qz6y5oDPda9fFM zt7PVhcOza9YoSj08XT6vy3SwSUnN/w0nrI4lCVqi3namcsPxHtU3fcn2b+q+RtgJ5XG4Zvo EMW4f+efs1ut6zj2c15w3jrfntuZ/4/31DQlluKMREMt5qLiRACegSoeswIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Seungwon Jeon Some host controller supports interrupt aggregation, but doesn't allow to reset counter and timer by s/w. Signed-off-by: Seungwon Jeon Signed-off-by: Alim Akhtar --- drivers/scsi/ufs/ufshcd.c | 3 ++- drivers/scsi/ufs/ufshcd.h | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index d41d57d..e388edc 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -3205,7 +3205,8 @@ static void ufshcd_transfer_req_compl(struct ufs_hba *hba) * false interrupt if device completes another request after resetting * aggregation and before reading the DB. */ - if (ufshcd_is_intr_aggr_allowed(hba)) + if (ufshcd_is_intr_aggr_allowed(hba) && + !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR)) ufshcd_reset_intr_aggr(hba); tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 3702b92..0b185e1 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -471,6 +471,12 @@ struct ufs_hba { */ #define UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR UFS_BIT(7) + /* + * This quirk needs to be enabled if host controller doesn't allow + * that the interrupt aggregation timer and counter are reset by s/w. + */ + #define UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR UFS_BIT(8) + unsigned int quirks; /* Deviations from standard UFSHCI spec. */ wait_queue_head_t tm_wq; -- 1.7.10.4