From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752885AbbJERGx (ORCPT ); Mon, 5 Oct 2015 13:06:53 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([207.82.80.143]:5650 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752309AbbJERCh (ORCPT ); Mon, 5 Oct 2015 13:02:37 -0400 From: "Suzuki K. Poulose" To: linux-arm-kernel@lists.infradead.org Cc: marc.zyngier@arm.com, will.deacon@arm.com, mark.rutland@arm.com, catalin.marinas@arm.com, steve.capper@linaro.org, linux-kernel@vger.kernel.org, andre.przywara@arm.com, dave.martin@arm.com, Vladimir.Murzin@arm.com, james.morse@arm.com, ard.biesheuvel@linaro.org, edward.nevill@linaro.org, aph@redhat.com, "Suzuki K. Poulose" Subject: [PATCH v2 09/22] arm64: Read system wide CPUID value Date: Mon, 5 Oct 2015 18:01:58 +0100 Message-Id: <1444064531-25607-10-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1444064531-25607-1-git-send-email-suzuki.poulose@arm.com> References: <1444064531-25607-1-git-send-email-suzuki.poulose@arm.com> X-OriginalArrivalTime: 05 Oct 2015 17:02:32.0474 (UTC) FILETIME=[A012D7A0:01D0FF8F] X-MC-Unique: mq1j8EltR6es0R0ZpwyvpQ-3 Content-Type: text/plain; charset=WINDOWS-1252 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id t95H6wI3008900 Add an API for reading the safe CPUID value across the system from the new infrastructure. Signed-off-by: Suzuki K. Poulose --- arch/arm64/include/asm/cpufeature.h | 2 ++ arch/arm64/kernel/cpufeature.c | 9 +++++++++ 2 files changed, 11 insertions(+) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 7ed92f2..2e17f9b 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -145,6 +145,8 @@ void check_local_cpu_features(void); bool cpu_supports_mixed_endian_el0(void); bool system_supports_mixed_endian_el0(void); +u64 read_system_reg(u32 id); + #endif /* __ASSEMBLY__ */ #endif diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index b5dd450..a4eff72 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -594,6 +594,15 @@ void update_cpu_features(int cpu, update_mixed_endian_el0_support(info); } +u64 read_system_reg(u32 id) +{ + struct arm64_ftr_reg *regp = get_arm64_sys_reg(id); + + /* We shouldn't get a request for an unsupported register */ + BUG_ON(!regp); + return regp->sys_val; +} + static bool feature_matches(u64 reg, const struct arm64_cpu_capabilities *entry) { -- 1.7.9.5