From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752563AbbJERCi (ORCPT ); Mon, 5 Oct 2015 13:02:38 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([207.82.80.143]:42599 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750964AbbJERCe (ORCPT ); Mon, 5 Oct 2015 13:02:34 -0400 From: "Suzuki K. Poulose" To: linux-arm-kernel@lists.infradead.org Cc: marc.zyngier@arm.com, will.deacon@arm.com, mark.rutland@arm.com, catalin.marinas@arm.com, steve.capper@linaro.org, linux-kernel@vger.kernel.org, andre.przywara@arm.com, dave.martin@arm.com, Vladimir.Murzin@arm.com, james.morse@arm.com, ard.biesheuvel@linaro.org, edward.nevill@linaro.org, aph@redhat.com, "Suzuki K. Poulose" Subject: [PATCH v2 02/22] arm64: Delay ELF HWCAP initialisation until all CPUs are up Date: Mon, 5 Oct 2015 18:01:51 +0100 Message-Id: <1444064531-25607-3-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1444064531-25607-1-git-send-email-suzuki.poulose@arm.com> References: <1444064531-25607-1-git-send-email-suzuki.poulose@arm.com> X-OriginalArrivalTime: 05 Oct 2015 17:02:31.0614 (UTC) FILETIME=[9F8F9DE0:01D0FF8F] X-MC-Unique: 6ygKE_uAS1qHr4Is-Vmtlg-3 Content-Type: text/plain; charset=WINDOWS-1252 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id t95H4xsY008842 Delay the ELF HWCAP initialisation untill all the (enabled) CPUs are up, i.e, smp_cpus_done(). This is in preparation for detecting the common features across the CPUS and creating a consistent ELF HWCAP for the system. Signed-off-by: Suzuki K. Poulose --- arch/arm64/include/asm/cpufeature.h | 1 + arch/arm64/kernel/setup.c | 16 ++++++++-------- arch/arm64/kernel/smp.c | 1 + 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 1715707..b7769f6 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -81,6 +81,7 @@ static inline int __attribute_const__ cpuid_feature_extract_field(u64 features, return (s64)(features << (64 - 4 - field)) >> (64 - 4); } +void __init setup_cpu_features(void); void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps, const char *info); diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 60fc9a9..d149c18 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -195,20 +195,13 @@ static void __init smp_build_mpidr_hash(void) __flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash)); } -static void __init setup_processor(void) +void __init setup_cpu_features(void) { u64 features; s64 block; u32 cwg; int cls; - pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id()); - - sprintf(init_utsname()->machine, ELF_PLATFORM); - elf_hwcap = 0; - - cpuinfo_store_boot_cpu(); - /* * Check for sane CTR_EL0.CWG value. */ @@ -292,6 +285,13 @@ static void __init setup_processor(void) #endif } +static void __init setup_processor(void) +{ + pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id()); + sprintf(init_utsname()->machine, ELF_PLATFORM); + cpuinfo_store_boot_cpu(); +} + static void __init setup_machine_fdt(phys_addr_t dt_phys) { void *dt_virt = fixmap_remap_fdt(dt_phys); diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 641f529..cb3e0d8 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -326,6 +326,7 @@ static void __init hyp_mode_check(void) void __init smp_cpus_done(unsigned int max_cpus) { pr_info("SMP: Total of %d processors activated.\n", num_online_cpus()); + setup_cpu_features(); hyp_mode_check(); apply_alternatives_all(); } -- 1.7.9.5