From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752980AbbJGJPW (ORCPT ); Wed, 7 Oct 2015 05:15:22 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:40326 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752205AbbJGJPP (ORCPT ); Wed, 7 Oct 2015 05:15:15 -0400 X-Listener-Flag: 11101 From: James Liao To: CC: Matthias Brugger , , Kevin Hilman , Daniel Kurtz , Sascha Hauer , , , , James Liao Subject: [PATCH v2 3/3] arm64: dts: mt8173: Add clocks for SCPSYS unit Date: Wed, 7 Oct 2015 17:14:41 +0800 Message-ID: <1444209281-25536-4-git-send-email-jamesjj.liao@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1444209281-25536-1-git-send-email-jamesjj.liao@mediatek.com> References: <1444209281-25536-1-git-send-email-jamesjj.liao@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add clocks needed by Mediatek VENC and VENC_LT power domianis. These clocks were needed by accessing subsystem's registers, so they need to be enabled before power on these subsystems. Signed-off-by: James Liao --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 06a1564..30fb201 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -227,8 +227,10 @@ #power-domain-cells = <1>; reg = <0 0x10006000 0 0x1000>; clocks = <&clk26m>, - <&topckgen CLK_TOP_MM_SEL>; - clock-names = "mfg", "mm"; + <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_VENC_SEL>, + <&topckgen CLK_TOP_VENC_LT_SEL>; + clock-names = "mfg", "mm", "venc", "venc_lt"; infracfg = <&infracfg>; }; -- 1.9.1