From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757571AbbJHNcj (ORCPT ); Thu, 8 Oct 2015 09:32:39 -0400 Received: from bhuna.collabora.co.uk ([93.93.135.160]:60434 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932650AbbJHNb1 (ORCPT ); Thu, 8 Oct 2015 09:31:27 -0400 From: Sjoerd Simons To: linux-rockchip@lists.infradead.org Cc: Jaroslav Kysela , devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Heiko Stuebner , Mark Brown , linux-kernel@vger.kernel.org, Kumar Gala , Ian Campbell , Takashi Iwai , Liam Girdwood , Sjoerd Simons , Pawel Moll , Rob Herring , Mark Rutland , Russell King , linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 6/8] ARM: dts: rockchip: Add SPDIF transceiver for RK3288 Date: Thu, 8 Oct 2015 15:31:17 +0200 Message-Id: <1444311079-2892-7-git-send-email-sjoerd.simons@collabora.co.uk> X-Mailer: git-send-email 2.6.1 In-Reply-To: <1444311079-2892-1-git-send-email-sjoerd.simons@collabora.co.uk> References: <1444311079-2892-1-git-send-email-sjoerd.simons@collabora.co.uk> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the SPDIF transceiver controller definition and pin setup for RK3288 SoCs Signed-off-by: Sjoerd Simons --- Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/boot/dts/rk3288.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 906e938..b905cf6 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -653,6 +653,23 @@ status = "disabled"; }; + spdif: sound@ff88b0000 { + compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif"; + reg = <0xff8b0000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <0>; + clock-names = "hclk", "mclk"; + clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>; + dmas = <&dmac_bus_s 3>; + dma-names = "tx"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx>; + rockchip,grf = <&grf>; + status = "disabled"; + }; + i2s: i2s@ff890000 { compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; reg = <0xff890000 0x10000>; @@ -1334,5 +1351,11 @@ <4 3 3 &pcfg_pull_none>; }; }; + + spdif { + spdif_tx: spdif-tx { + rockchip,pins = ; + }; + }; }; }; -- 2.6.1