From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964897AbbJMR3h (ORCPT ); Tue, 13 Oct 2015 13:29:37 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([207.82.80.143]:53861 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753175AbbJMRXK (ORCPT ); Tue, 13 Oct 2015 13:23:10 -0400 From: "Suzuki K. Poulose" To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, dave.martin@arm.com, Vladimir.Murzin@arm.com, steve.capper@linaro.org, linux-kernel@vger.kernel.org, ard.biesheuvel@linaro.org, james.morse@arm.com, marc.zyngier@arm.com, christoffer.dall@linaro.org, andre.przywara@arm.com, edward.nevill@linaro.org, aph@redhat.com, ryan.arnold@linaro.org, "Suzuki K. Poulose" Subject: [PATCH v3 08/24] arm64: Handle width of a cpuid feature Date: Tue, 13 Oct 2015 18:22:16 +0100 Message-Id: <1444756952-31145-9-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1444756952-31145-1-git-send-email-suzuki.poulose@arm.com> References: <1444756952-31145-1-git-send-email-suzuki.poulose@arm.com> X-OriginalArrivalTime: 13 Oct 2015 17:23:06.0241 (UTC) FILETIME=[D2C2BF10:01D105DB] X-MC-Unique: p-V7D-EwTbWmP-IfZlG38A-5 Content-Type: text/plain; charset=WINDOWS-1252 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id t9DHUcIl028519 Introduce a helper to extract cpuid feature for any given width. Cc: Catalin Marinas Signed-off-by: Suzuki K. Poulose --- arch/arm64/include/asm/cpufeature.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index b5f313d..85507fe 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -76,10 +76,16 @@ static inline void cpus_set_cap(unsigned int num) __set_bit(num, cpu_hwcaps); } -static inline int __attribute_const__ cpuid_feature_extract_field(u64 features, - int field) +static inline int __attribute_const__ +cpuid_feature_extract_field_width(u64 features, int field, int width) { - return (s64)(features << (64 - 4 - field)) >> (64 - 4); + return (s64)(features << (64 - width - field)) >> (64 - width); +} + +static inline int __attribute_const__ +cpuid_feature_extract_field(u64 features, int field) +{ + return cpuid_feature_extract_field_width(features, field, 4); } static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0) -- 1.7.9.5