From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932082AbbJNLVg (ORCPT ); Wed, 14 Oct 2015 07:21:36 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([207.82.80.143]:61224 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753500AbbJNLVH (ORCPT ); Wed, 14 Oct 2015 07:21:07 -0400 From: "Suzuki K. Poulose" To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, steve.capper@linaro.org, marc.zyngier@arm.com, ard.biesheuvel@linaro.org, christoffer.dall@linaro.org, "Suzuki K. Poulose" Subject: [PATCHv3 11/11] arm64: 36 bit VA Date: Wed, 14 Oct 2015 12:20:34 +0100 Message-Id: <1444821634-1689-12-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1444821634-1689-1-git-send-email-suzuki.poulose@arm.com> References: <1444821634-1689-1-git-send-email-suzuki.poulose@arm.com> X-OriginalArrivalTime: 14 Oct 2015 11:20:56.0823 (UTC) FILETIME=[656E7070:01D10672] X-MC-Unique: XQhhP69TT9aQCExBexa9-g-11 Content-Type: text/plain; charset=WINDOWS-1252 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id t9EBLuP5002290 36bit VA lets us use 2 level page tables while limiting the available address space to 64GB. Cc: Mark Rutland Cc: Catalin Marinas Cc: Will Deacon Signed-off-by: Suzuki K. Poulose Reviewed-by: Ard Biesheuvel Tested-by: Ard Biesheuvel --- arch/arm64/Kconfig | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index e78045c..3b99aa9 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -170,6 +170,7 @@ config FIX_EARLYCON_MEM config PGTABLE_LEVELS int + default 2 if ARM64_16K_PAGES && ARM64_VA_BITS_36 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39 @@ -391,6 +392,10 @@ choice space sizes. The level of translation table is determined by a combination of page size and virtual address space size. +config ARM64_VA_BITS_36 + bool "36-bit" + depends on ARM64_16K_PAGES + config ARM64_VA_BITS_39 bool "39-bit" depends on ARM64_4K_PAGES @@ -410,6 +415,7 @@ endchoice config ARM64_VA_BITS int + default 36 if ARM64_VA_BITS_36 default 39 if ARM64_VA_BITS_39 default 42 if ARM64_VA_BITS_42 default 47 if ARM64_VA_BITS_47 @@ -480,7 +486,7 @@ config ARCH_WANT_GENERAL_HUGETLB def_bool y config ARCH_WANT_HUGE_PMD_SHARE - def_bool y if ARM64_4K_PAGES || ARM64_16K_PAGES + def_bool y if ARM64_4K_PAGES || (ARM64_16K_PAGES && !ARM64_VA_BITS_36) config HAVE_ARCH_TRANSPARENT_HUGEPAGE def_bool y -- 1.7.9.5