From: Murali Karicheri <m-karicheri2@ti.com>
To: <corbet@lwn.net>, <ssantosh@kernel.org>,
<linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <robh+dt@kernel.org>,
<pawel.moll@arm.com>, <mark.rutland@arm.com>,
<ijc+devicetree@hellion.org.uk>, <galak@codeaurora.org>,
<linux@arm.linux.org.uk>, <devicetree@vger.kernel.org>,
<arnd@arndb.de>
Subject: [PATCH v4 1/3] Documentation: dt: soc: Add description for knav qmss driver
Date: Wed, 14 Oct 2015 10:17:13 -0400 [thread overview]
Message-ID: <1444832235-15263-2-git-send-email-m-karicheri2@ti.com> (raw)
In-Reply-To: <1444832235-15263-1-git-send-email-m-karicheri2@ti.com>
Add a documentation for knav qmss driver.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
---
v4: added Arnd's Acked-by
Documentation/arm/keystone/knav-qmss.txt | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 Documentation/arm/keystone/knav-qmss.txt
diff --git a/Documentation/arm/keystone/knav-qmss.txt b/Documentation/arm/keystone/knav-qmss.txt
new file mode 100644
index 0000000..79946d1
--- /dev/null
+++ b/Documentation/arm/keystone/knav-qmss.txt
@@ -0,0 +1,24 @@
+* Texas Instruments Keystone Navigator Queue Management SubSystem driver
+
+Driver source code path
+ drivers/soc/ti/knav_qmss.c
+ drivers/soc/ti/knav_qmss_acc.c
+
+The QMSS (Queue Manager Sub System) found on Keystone SOCs is one of
+the main hardware sub system which forms the backbone of the Keystone
+multi-core Navigator. QMSS consist of queue managers, packed-data structure
+processors(PDSP), linking RAM, descriptor pools and infrastructure
+Packet DMA.
+The Queue Manager is a hardware module that is responsible for accelerating
+management of the packet queues. Packets are queued/de-queued by writing or
+reading descriptor address to a particular memory mapped location. The PDSPs
+perform QMSS related functions like accumulation, QoS, or event management.
+Linking RAM registers are used to link the descriptors which are stored in
+descriptor RAM. Descriptor RAM is configurable as internal or external memory.
+The QMSS driver manages the PDSP setups, linking RAM regions,
+queue pool management (allocation, push, pop and notify) and descriptor
+pool management.
+
+knav qmss driver provides a set of APIs to drivers to open/close qmss queues,
+allocate descriptor pools, map the descriptors, push/pop to queues etc. For
+details of the available APIs, please refers to include/linux/soc/ti/knav_qmss.h
--
1.9.1
next prev parent reply other threads:[~2015-10-14 14:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-14 14:17 [PATCH v4 0/3] Murali Karicheri
2015-10-14 14:17 ` Murali Karicheri [this message]
2015-10-14 14:17 ` [PATCH v4 2/3] soc: ti: add firmware file name as part of the driver Murali Karicheri
2015-10-14 14:17 ` [PATCH v4 3/3] soc: ti: qmss: make acc queue support optional in " Murali Karicheri
2015-10-14 15:41 ` [PATCH v4 0/3] santosh shilimkar
2015-10-15 16:02 ` Murali Karicheri
2015-10-15 16:21 ` santosh shilimkar
2015-10-15 16:29 ` Murali Karicheri
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