From: <dinguyen@opensource.altera.com>
To: <tthayer@opensource.altera.com>
Cc: <dinh.linux@gmail.com>, <dougthompson@xmission.com>,
<bp@alien8.de>, <mchehab@osg.samsung.com>,
<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Dinh Nguyen <dinguyen@opensource.altera.com>
Subject: [PATCH] EDAC, altera: SoCFPGA EDAC should not look for ECC_CORR_EN
Date: Wed, 14 Oct 2015 18:14:16 -0500 [thread overview]
Message-ID: <1444864456-21778-1-git-send-email-dinguyen@opensource.altera.com> (raw)
From: Dinh Nguyen <dinguyen@opensource.altera.com>
The bootloader may or may not enable the ECC_CORR_EN bit. By not enabling
ECC_CORR_EN, when error happens, it is the user's responsibility to perform
a full SDRAM scrub.
Remove the check for ECC_CORR_EN.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
drivers/edac/altera_edac.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h
index 7b64dc7..7a52585 100644
--- a/drivers/edac/altera_edac.h
+++ b/drivers/edac/altera_edac.h
@@ -30,8 +30,7 @@
#define CV_CTLCFG_GEN_SB_ERR 0x2000
#define CV_CTLCFG_GEN_DB_ERR 0x4000
-#define CV_CTLCFG_ECC_AUTO_EN (CV_CTLCFG_ECC_EN | \
- CV_CTLCFG_ECC_CORR_EN)
+#define CV_CTLCFG_ECC_AUTO_EN (CV_CTLCFG_ECC_EN)
/* SDRAM Controller Address Width Register */
#define CV_DRAMADDRW_OFST 0x2C
--
2.4.5
next reply other threads:[~2015-10-14 23:21 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-14 23:14 dinguyen [this message]
2015-10-15 9:57 ` Borislav Petkov
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