From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752317AbbJSFnY (ORCPT ); Mon, 19 Oct 2015 01:43:24 -0400 Received: from mail-gw3-out.broadcom.com ([216.31.210.64]:23691 "EHLO mail-gw3-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750759AbbJSFnV (ORCPT ); Mon, 19 Oct 2015 01:43:21 -0400 X-IronPort-AV: E=Sophos;i="5.17,700,1437462000"; d="scan'208";a="77801028" From: Pramod Kumar To: Rob Herring , Pawel Moll , "Mark Rutland" , Ian Campbell , Kumar Gala , Ray Jui , Scott Branden , Russell King , Linus Walleij , CC: BCM Kernel Feedback , Jason Uy , Masahiro Yamada , Thomas Gleixner , Laurent Pinchart , , , , Jonas Gorski , Pramod Kumar Subject: [PATCH 01/11] dt-bindings: pinctrl: Optional DT property to support pin mappings Date: Mon, 19 Oct 2015 11:13:08 +0530 Message-ID: <1445233398-27129-2-git-send-email-pramodku@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445233398-27129-1-git-send-email-pramodku@broadcom.com> References: <1445233398-27129-1-git-send-email-pramodku@broadcom.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If GPIO controller's pins are muxed, pin-controller subsystem need to be intimated by defining mapping between gpio and pinmux controller. This patch adds required properties to define this mapping via DT. Signed-off-by: Pramod Kumar Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- .../devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt b/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt index 6540ca5..25a5002 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/brcm,cygnus-gpio.txt @@ -26,9 +26,13 @@ Optional properties: - interrupt-controller: Specifies that the node is an interrupt controller -- pinmux: - Specifies the phandle to the IOMUX device, where pins can be individually -muxed to GPIO +- gpio-ranges: + Specifies the mapping between gpio controller and pin-controllers pins. + This requires 4 fields in cells defined as - + 1. Phandle of pin-controller. + 2. GPIO base pin offset. + 3 Pin-control base pin offset. + 4. number of gpio pins which are linearly mapped from pin base. Supported generic PINCONF properties in child nodes: @@ -78,6 +82,8 @@ Example: gpio-controller; interrupts = ; interrupt-controller; + gpio-ranges = <&pinctrl 0 42 1>, + <&pinctrl 1 44 3>; }; /* -- 1.9.1