From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753504AbbJSIUV (ORCPT ); Mon, 19 Oct 2015 04:20:21 -0400 Received: from mail-bn1bon0088.outbound.protection.outlook.com ([157.56.111.88]:59616 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753269AbbJSIUM (ORCPT ); Mon, 19 Oct 2015 04:20:12 -0400 Authentication-Results: spf=softfail (sender IP is 66.35.236.227) smtp.mailfrom=altera.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=altera.com; From: Ley Foon Tan To: Bjorn Helgaas , Russell King , Marc Zyngier CC: Arnd Bergmann , Dinh Nguyen , , , , , , Ley Foon Tan , , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , "Kumar Gala" , Lorenzo Pieralisi Subject: [PATCH v10 5/6] Documentation: dt-bindings: pci: altera pcie device tree binding Date: Mon, 19 Oct 2015 16:19:27 +0800 Message-ID: <1445242768-4423-6-git-send-email-lftan@altera.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1445242768-4423-1-git-send-email-lftan@altera.com> References: <1445242768-4423-1-git-send-email-lftan@altera.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BN1AFFO11FD052;1:uemW1L8Ri7MtwwfOTMwfFF4e8C+P8C+To7cuvVkS9ktkt7YJmRDA3KjEbjMC8NuraX6avkoG89iImwoPAy9nzV9ZuYz8ed6cVra8cN4XPDeQ9vhzhlBbDrKvD9n2qVF8Igdsqp9sczjFuHRRXYtCkMrinEMyWF1lWwcPkqwnq8s+0ju6915J8wqPZTkWeVtBXjNRAPSURLJajLPY18hwzScYNI3CJLiOc+9Rq0n9kR7iwDlb7JUXidhSYLblStkRVqwZsgoONDQjkpD980A9vWRX2cS7I+at+RDl13kInzl0U0aPGZ7F76oQCBWijzoopr+vNMqJVJgmHh2+O5djWPwyyeZIydRHUv73uNgkkeaaBYW8Sw7ihbnEfBO192Ek X-Forefront-Antispam-Report: CIP:66.35.236.227;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(189002)(199003)(5001960100002)(48376002)(6806005)(50986999)(105596002)(33646002)(229853001)(86362001)(46102003)(36756003)(42186005)(106466001)(47776003)(189998001)(5003940100001)(64706001)(97736004)(5001770100001)(5007970100001)(50466002)(50226001)(19580395003)(19580405001)(76176999)(92566002)(11100500001)(81156007)(2950100001)(5008740100001)(87936001)(7099028);DIR:OUT;SFP:1101;SCL:1;SRVR:BY2PR03MB044;H:sj-itexedge03.altera.priv.altera.com;FPR:;SPF:SoftFail;PTR:InfoDomainNonexistent;MX:1;A:1;LANG:en; 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Signed-off-by: Ley Foon Tan --- .../devicetree/bindings/pci/altera-pcie-msi.txt | 28 +++++++++++++ .../devicetree/bindings/pci/altera-pcie.txt | 49 ++++++++++++++++++++++ 2 files changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/altera-pcie-msi.txt create mode 100644 Documentation/devicetree/bindings/pci/altera-pcie.txt diff --git a/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt b/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt new file mode 100644 index 0000000..09cd3bc --- /dev/null +++ b/Documentation/devicetree/bindings/pci/altera-pcie-msi.txt @@ -0,0 +1,28 @@ +* Altera PCIe MSI controller + +Required properties: +- compatible: should contain "altr,msi-1.0" +- reg: specifies the physical base address of the controller and + the length of the memory mapped region. +- reg-names: must include the following entries: + "csr": CSR registers + "vector_slave": vectors slave port region +- interrupt-parent: interrupt source phandle. +- interrupts: specifies the interrupt source of the parent interrupt + controller. The format of the interrupt specifier depends on the + parent interrupt controller. +- num-vectors: number of vectors, range 1 to 32. +- msi-controller: indicates that this is MSI controller node + + +Example +msi0: msi@0xFF200000 { + compatible = "altr,msi-1.0"; + reg = <0xFF200000 0x00000010 + 0xFF200010 0x00000080>; + reg-names = "csr", "vector_slave"; + interrupt-parent = <&hps_0_arm_gic_0>; + interrupts = <0 42 4>; + msi-controller; + num-vectors = <32>; +}; diff --git a/Documentation/devicetree/bindings/pci/altera-pcie.txt b/Documentation/devicetree/bindings/pci/altera-pcie.txt new file mode 100644 index 0000000..2951a6a --- /dev/null +++ b/Documentation/devicetree/bindings/pci/altera-pcie.txt @@ -0,0 +1,49 @@ +* Altera PCIe controller + +Required properties: +- compatible : should contain "altr,pcie-root-port-1.0" +- reg: a list of physical base address and length for TXS and CRA. +- reg-names: must include the following entries: + "Txs": TX slave port region + "Cra": Control register access region +- interrupt-parent: interrupt source phandle. +- interrupts: specifies the interrupt source of the parent interrupt controller. + The format of the interrupt specifier depends on the parent interrupt + controller. +- device_type: must be "pci" +- #address-cells: set to <3> +- #size-cells: set to <2> +- #interrupt-cells: set to <1> +- ranges: describes the translation of addresses for root ports and standard + PCI regions. +- interrupt-map-mask and interrupt-map: standard PCI properties to define the + mapping of the PCIe interface to interrupt numbers. + +Optional properties: +- msi-parent: Link to the hardware entity that serves as the MSI controller for this PCIe + controller. +- bus-range: PCI bus numbers covered + +Example + pcie_0: pcie@0xc00000000 { + compatible = "altr,pcie-root-port-1.0"; + reg = <0xc0000000 0x20000000>, + <0xff220000 0x00004000>; + reg-names = "Txs", "Cra"; + interrupt-parent = <&hps_0_arm_gic_0>; + interrupts = <0 40 4>; + interrupt-controller; + #interrupt-cells = <1>; + bus-range = <0x0 0xFF>; + device_type = "pci"; + msi-parent = <&msi_to_gic_gen_0>; + #address-cells = <3>; + #size-cells = <2>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_0 1>, + <0 0 0 2 &pcie_0 2>, + <0 0 0 3 &pcie_0 3>, + <0 0 0 4 &pcie_0 4>; + ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000 + 0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>; + }; -- 1.8.2.1