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From: Anju T <>
To: linux-kernel@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org, sukadev@linux.vnet.ibm.com,
	acme@redhat.com, mpe@ellerman.id.au, dsahern@gmail.com,
	jolsa@redhat.com, maddy@linux.vnet.ibm.com,
	khandual@linux.vnet.ibm.com, hemant@linux.vnet.ibm.com,
	Anju <anju@linux.vnet.ibm.com>
Subject: [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power
Date: Mon, 19 Oct 2015 17:48:51 +0530	[thread overview]
Message-ID: <1445257133-27646-2-git-send-email-anju@linux.vnet.ibm.com> (raw)
In-Reply-To: <1445257133-27646-1-git-send-email-anju@linux.vnet.ibm.com>

From: Anju <anju@linux.vnet.ibm.com>

The enum definition assigns an 'id' to each register in power.
The order of these values in the enum definition are based on
the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h .

Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
 arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)
 create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h

diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
new file mode 100644
index 0000000..b97727c
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -0,0 +1,55 @@
+#ifndef _ASM_POWERPC_PERF_REGS_H
+#define _ASM_POWERPC_PERF_REGS_H
+
+enum perf_event_powerpc_regs {
+	PERF_REG_POWERPC_GPR0,
+	PERF_REG_POWERPC_GPR1,
+	PERF_REG_POWERPC_GPR2,
+	PERF_REG_POWERPC_GPR3,
+	PERF_REG_POWERPC_GPR4,
+	PERF_REG_POWERPC_GPR5,
+	PERF_REG_POWERPC_GPR6,
+	PERF_REG_POWERPC_GPR7,
+	PERF_REG_POWERPC_GPR8,
+	PERF_REG_POWERPC_GPR9,
+	PERF_REG_POWERPC_GPR10,
+	PERF_REG_POWERPC_GPR11,
+	PERF_REG_POWERPC_GPR12,
+	PERF_REG_POWERPC_GPR13,
+	PERF_REG_POWERPC_GPR14,
+	PERF_REG_POWERPC_GPR15,
+	PERF_REG_POWERPC_GPR16,
+	PERF_REG_POWERPC_GPR17,
+	PERF_REG_POWERPC_GPR18,
+	PERF_REG_POWERPC_GPR19,
+	PERF_REG_POWERPC_GPR20,
+	PERF_REG_POWERPC_GPR21,
+	PERF_REG_POWERPC_GPR22,
+	PERF_REG_POWERPC_GPR23,
+	PERF_REG_POWERPC_GPR24,
+	PERF_REG_POWERPC_GPR25,
+	PERF_REG_POWERPC_GPR26,
+	PERF_REG_POWERPC_GPR27,
+	PERF_REG_POWERPC_GPR28,
+	PERF_REG_POWERPC_GPR29,
+	PERF_REG_POWERPC_GPR30,
+	PERF_REG_POWERPC_GPR31,
+	PERF_REG_POWERPC_NIP,
+	PERF_REG_POWERPC_MSR,
+	PERF_REG_POWERPC_ORIG_R3,
+	PERF_REG_POWERPC_CTR,
+	PERF_REG_POWERPC_LNK,
+	PERF_REG_POWERPC_XER,
+	PERF_REG_POWERPC_CCR,
+#ifdef __powerpc64__
+	PERF_REG_POWERPC_SOFTE,
+#else
+	PERF_REG_POWERPC_MQ,
+#endif
+	PERF_REG_POWERPC_TRAP,
+	PERF_REG_POWERPC_DAR,
+	PERF_REG_POWERPC_DSISR,
+	PERF_REG_POWERPC_RESULT,
+	PERF_REG_POWERPC_MAX,
+};
+#endif /* _ASM_POWERPC_PERF_REGS_H */
-- 
2.1.0


  reply	other threads:[~2015-10-19 12:19 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-19 12:18 [RFC][PATCH 0/3]perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
2015-10-19 12:18 ` Anju T [this message]
2015-10-20  4:16   ` [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power Madhavan Srinivasan
2015-10-20  6:43     ` AnjuTSudhakar
2015-10-19 12:18 ` [RFC][PATCH 2/3] tools/perf:Map the ID values with register names Anju T
2015-10-19 12:18 ` [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state Anju T
2015-10-20  4:20   ` Madhavan Srinivasan
2015-10-20  6:45     ` AnjuTSudhakar

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