From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753986AbbJTVuY (ORCPT ); Tue, 20 Oct 2015 17:50:24 -0400 Received: from mail-pa0-f50.google.com ([209.85.220.50]:35981 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753557AbbJTVuR (ORCPT ); Tue, 20 Oct 2015 17:50:17 -0400 From: Franklin S Cooper Jr To: linux@arm.linux.org.uk, ssantosh@kernel.org, ulf.hansson@linaro.org, m-karicheri2@ti.com, grygorii.strashko@ti.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Cc: Franklin Cooper Subject: [PATCH 1/5] ARM: Keystone: Enable PINCTRL for Keystone ARCH Date: Tue, 20 Oct 2015 16:50:05 -0500 Message-Id: <1445377809-12516-1-git-send-email-fcooper@ti.com> X-Mailer: git-send-email 2.6.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Franklin Cooper Unlike other Keystone 2 devices, newer Keystone 2 SOCs may utilize pinmuxing which requires PINCTRL to be enabled. Therefore, enable PINCTRL for all Keystone 2 devices. Signed-off-by: Franklin S Cooper Jr --- arch/arm/mach-keystone/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig index ea955f6db..7a432ee 100644 --- a/arch/arm/mach-keystone/Kconfig +++ b/arch/arm/mach-keystone/Kconfig @@ -11,6 +11,7 @@ config ARCH_KEYSTONE select ZONE_DMA if ARM_LPAE select MIGHT_HAVE_PCI select PCI_DOMAINS if PCI + select PINCTRL help Support for boards based on the Texas Instruments Keystone family of SoCs. -- 2.6.1