From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964907AbbJVB0U (ORCPT ); Wed, 21 Oct 2015 21:26:20 -0400 Received: from mail-pa0-f66.google.com ([209.85.220.66]:34487 "EHLO mail-pa0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932201AbbJVB0Q (ORCPT ); Wed, 21 Oct 2015 21:26:16 -0400 From: Caesar Wang To: Heiko Stuebner Cc: Dmitry Torokhov , dianders@chromium.org, Eduardo Valentin , Caesar Wang , Russell King , devicetree@vger.kernel.org, Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , linux-rockchip@lists.infradead.org, Rob Herring , Pawel Moll , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/2] ARM: dts: rockchip: Add the OTP gpio pinctrl Date: Thu, 22 Oct 2015 09:25:30 +0800 Message-Id: <1445477130-17065-3-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445477130-17065-1-git-send-email-wxt@rock-chips.com> References: <1445477130-17065-1-git-send-email-wxt@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the "init" pinctrl as the OTP gpio state. We need the OTP pin is gpio state before resetting the TSADC controller, since the tshut polarity will generate a high signal. "init" pinctrl property is defined by Doug's Patch[0]. Patch[0]: https://patchwork.kernel.org/patch/7454311/ Signed-off-by: Caesar Wang Reviewed-by: Douglas Anderson --- Changes in v2: - Add some commits for more obvious in PATCH[2/2] Changes in v1: - As the Doug comments, drop the thermal driver patchs since we can with pinctrl changing to work. - As the Doug's patch to add the 'init' property. arch/arm/boot/dts/rk3288.dtsi | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 906e938..6ea89aa 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -447,8 +447,9 @@ clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; - pinctrl-names = "default"; - pinctrl-0 = <&otp_out>; + pinctrl-names = "init", "default"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; status = "disabled"; @@ -1273,6 +1274,10 @@ }; tsadc { + otp_gpio: otp-gpio { + rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>; + }; + otp_out: otp-out { rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>; }; -- 1.9.1