From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965657AbbJVUGS (ORCPT ); Thu, 22 Oct 2015 16:06:18 -0400 Received: from mail-bn1bon0135.outbound.protection.outlook.com ([157.56.111.135]:12352 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1758109AbbJVUFj (ORCPT ); Thu, 22 Oct 2015 16:05:39 -0400 X-Greylist: delayed 79056 seconds by postgrey-1.27 at vger.kernel.org; Thu, 22 Oct 2015 16:05:37 EDT Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=freescale.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=freescale.com; From: Han Xu To: CC: , , , , , , , , , , Subject: [PATCH v6 5/7] mtd: nand: gpmi: add GPMI NAND support for i.MX7D Date: Thu, 22 Oct 2015 14:54:34 -0500 Message-ID: <1445543676-19876-6-git-send-email-b45815@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445543676-19876-1-git-send-email-b45815@freescale.com> References: <1445543676-19876-1-git-send-email-b45815@freescale.com> X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BY2FFO11OLC002;1:b1Firo/BUVS1HoYZU9jExQbESuzCk1OyWd38eYXJFD+nBhuxgQMHpGBctjf1Xgu28eqvFP2M9TIFqNe8Z8NiqI8qDUDCp8RqEs96y6C7KrSYqZnR9lymgkB1+ScEemPjO31kmeyoKZqsFZJWGz/z7QWVxOW+AaFs4lScQU++jdxRCqelgdJ39cP1uyCwKIRo1Dtj1xnCl8hm/XY2N/0Z15RRY8qZ0ha3KsCGujQnwpBy/NKnTL25itKTv24YpzkE0a54ObWmDyVWee+8IN5SKutzrXeu0WTMYISEG9I6O9KTu+lUSlSrkBpJ4zCS9X/wQV9HzU9CTK4s9pnlulCXh4HmuMDfeECt8aOgcnNogKDh65LbbyVaezja6TttsjIjHBORerOXe75q0iQ8FkHYnQ== X-Forefront-Antispam-Report: CIP:192.88.168.50;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(2980300002)(1109001)(1110001)(339900001)(189002)(199003)(19580405001)(76176999)(5003940100001)(50466002)(229853001)(106466001)(2351001)(47776003)(5007970100001)(50986999)(104016004)(6806005)(48376002)(110136002)(11100500001)(77096005)(2950100001)(189998001)(105606002)(97736004)(81156007)(5001960100002)(19580395003)(5008740100001)(85426001)(50226001)(92566002)(36756003)(33646002)(87936001)(575784001)(2004002)(217873001);DIR:OUT;SFP:1102;SCL:1;SRVR:DM2PR03MB557;H:tx30smr01.am.freescale.net;FPR:;SPF:Fail;PTR:InfoDomainNonexistent;MX:1;A:1;LANG:en; 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you can redistribute it and/or modify @@ -54,7 +54,7 @@ #define MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0 11 #define MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0 (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0) #define BF_BCH_FLASH0LAYOUT0_ECC0(v, x) \ - (GPMI_IS_MX6(x) \ + ((GPMI_IS_MX6(x) || GPMI_IS_MX7(x)) \ ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0) \ & MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0) \ : (((v) << BP_BCH_FLASH0LAYOUT0_ECC0) \ @@ -65,7 +65,7 @@ #define MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14 \ (0x1 << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14) #define BF_BCH_FLASH0LAYOUT0_GF(v, x) \ - ((GPMI_IS_MX6(x) && ((v) == 14)) \ + (((GPMI_IS_MX6(x) || GPMI_IS_MX7(x)) && ((v) == 14))\ ? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14) \ & MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14) \ : 0 \ @@ -77,7 +77,7 @@ #define MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE \ (0x3ff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE) #define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x) \ - (GPMI_IS_MX6(x) \ + ((GPMI_IS_MX6(x) || GPMI_IS_MX7(x)) \ ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \ : ((v) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \ ) @@ -96,7 +96,7 @@ #define MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN 11 #define MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN) #define BF_BCH_FLASH0LAYOUT1_ECCN(v, x) \ - (GPMI_IS_MX6(x) \ + ((GPMI_IS_MX6(x) || GPMI_IS_MX7(x)) \ ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN) \ & MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN) \ : (((v) << BP_BCH_FLASH0LAYOUT1_ECCN) \ @@ -107,7 +107,7 @@ #define MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14 \ (0x1 << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14) #define BF_BCH_FLASH0LAYOUT1_GF(v, x) \ - ((GPMI_IS_MX6(x) && ((v) == 14)) \ + (((GPMI_IS_MX6(x) || GPMI_IS_MX7(x)) && ((v) == 14))\ ? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14) \ & MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14) \ : 0 \ @@ -119,7 +119,7 @@ #define MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE \ (0x3ff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE) #define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x) \ - (GPMI_IS_MX6(x) \ + ((GPMI_IS_MX6(x) || GPMI_IS_MX7(x)) \ ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \ : ((v) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \ ) diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c index 43fa16b..1f26a79 100644 --- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c +++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c @@ -1,7 +1,7 @@ /* * Freescale GPMI NAND Flash Driver * - * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. + * Copyright (C) 2008-2015 Freescale Semiconductor, Inc. * Copyright (C) 2008 Embedded Alley Solutions, Inc. * * This program is free software; you can redistribute it and/or modify @@ -971,7 +971,8 @@ int gpmi_extra_init(struct gpmi_nand_data *this) struct nand_chip *chip = &this->nand; /* Enable the asynchronous EDO feature. */ - if (GPMI_IS_MX6(this) && chip->onfi_version) { + if ((GPMI_IS_MX6(this) || GPMI_IS_MX7(this)) && + chip->onfi_version) { int mode = onfi_get_async_timing_mode(chip); /* We only support the timing mode 4 and mode 5. */ @@ -1093,12 +1094,13 @@ int gpmi_is_ready(struct gpmi_nand_data *this, unsigned chip) if (GPMI_IS_MX23(this)) { mask = MX23_BM_GPMI_DEBUG_READY0 << chip; reg = readl(r->gpmi_regs + HW_GPMI_DEBUG); - } else if (GPMI_IS_MX28(this) || GPMI_IS_MX6(this)) { + } else if (GPMI_IS_MX28(this) || GPMI_IS_MX6(this) || + GPMI_IS_MX7(this)) { /* * In the imx6, all the ready/busy pins are bound * together. So we only need to check chip 0. */ - if (GPMI_IS_MX6(this)) + if (GPMI_IS_MX6(this) || GPMI_IS_MX7(this)) chip = 0; /* MX28 shares the same R/B register as MX6Q. */ diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c index 998fa88..e24fa06 100644 --- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c @@ -77,6 +77,12 @@ static const struct gpmi_devdata gpmi_devdata_imx6sx = { .max_chain_delay = 12, }; +static const struct gpmi_devdata gpmi_devdata_imx7d = { + .type = IS_MX7D, + .bch_max_ecc_strength = 62, + .max_chain_delay = 12, +}; + static irqreturn_t bch_irq(int irq, void *cookie) { struct gpmi_nand_data *this = cookie; @@ -575,6 +581,10 @@ static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = { "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch", }; +static char *extra_clks_for_mx7d[GPMI_CLK_MAX] = { + "gpmi_bch_apb", +}; + static int gpmi_get_clks(struct gpmi_nand_data *this) { struct resources *r = &this->resources; @@ -592,6 +602,8 @@ static int gpmi_get_clks(struct gpmi_nand_data *this) /* Get extra clocks */ if (GPMI_IS_MX6(this)) extra_clks = extra_clks_for_mx6q; + if (GPMI_IS_MX7(this)) + extra_clks = extra_clks_for_mx7d; if (!extra_clks) return 0; @@ -608,7 +620,7 @@ static int gpmi_get_clks(struct gpmi_nand_data *this) r->clock[i] = clk; } - if (GPMI_IS_MX6(this)) + if (GPMI_IS_MX6(this) || GPMI_IS_MX7(this)) /* * Set the default value for the gpmi clock. * @@ -1869,8 +1881,8 @@ static int gpmi_init_last(struct gpmi_nand_data *this) * (1) the chip is imx6, and * (2) the size of the ECC parity is byte aligned. */ - if (GPMI_IS_MX6(this) && - ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) { + if ((GPMI_IS_MX6(this) || GPMI_IS_MX7(this)) && + ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) { ecc->read_subpage = gpmi_ecc_read_subpage; chip->options |= NAND_SUBPAGE_READ; } @@ -1936,7 +1948,8 @@ static int gpmi_nand_init(struct gpmi_nand_data *this) if (ret) goto err_out; - ret = nand_scan_ident(mtd, GPMI_IS_MX6(this) ? 2 : 1, NULL); + ret = nand_scan_ident(mtd, GPMI_IS_MX6(this) || + GPMI_IS_MX7(this) ? 2 : 1, NULL); if (ret) goto err_out; @@ -1980,7 +1993,11 @@ static const struct of_device_id gpmi_nand_id_table[] = { }, { .compatible = "fsl,imx6sx-gpmi-nand", .data = &gpmi_devdata_imx6sx, - }, {} + }, { + .compatible = "fsl,imx7d-gpmi-nand", + .data = (void *)&gpmi_devdata_imx7d, + }, { /* sentinel */ } + }; MODULE_DEVICE_TABLE(of, gpmi_nand_id_table); diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h index 544062f..58b3d69 100644 --- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h +++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h @@ -1,7 +1,7 @@ /* * Freescale GPMI NAND Flash Driver * - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. * Copyright (C) 2008 Embedded Alley Solutions, Inc. * * This program is free software; you can redistribute it and/or modify @@ -123,7 +123,8 @@ enum gpmi_type { IS_MX23, IS_MX28, IS_MX6Q, - IS_MX6SX + IS_MX6SX, + IS_MX7D, }; struct gpmi_devdata { @@ -306,6 +307,8 @@ void gpmi_copy_bits(u8 *dst, size_t dst_bit_off, #define GPMI_IS_MX28(x) ((x)->devdata->type == IS_MX28) #define GPMI_IS_MX6Q(x) ((x)->devdata->type == IS_MX6Q) #define GPMI_IS_MX6SX(x) ((x)->devdata->type == IS_MX6SX) +#define GPMI_IS_MX7D(x) ((x)->devdata->type == IS_MX7D) #define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x)) +#define GPMI_IS_MX7(x) (GPMI_IS_MX7D(x)) #endif -- 1.9.1