From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753992AbbJZMp5 (ORCPT ); Mon, 26 Oct 2015 08:45:57 -0400 Received: from e23smtp02.au.ibm.com ([202.81.31.144]:49830 "EHLO e23smtp02.au.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753394AbbJZMpJ (ORCPT ); Mon, 26 Oct 2015 08:45:09 -0400 X-Helo: d23dlp03.au.ibm.com X-MailFrom: anju@linux.vnet.ibm.com X-RcptTo: linux-kernel@vger.kernel.org From: Anju T To: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Cc: sukadev@linux.vnet.ibm.com, maddy@linux.vnet.ibm.com, jolsa@redhat.com, dsahern@gmail.com, acme@redhat.com, mpe@ellerman.id.au, khandual@linux.vnet.ibm.com, hemant@linux.vnet.ibm.com, naveen.n.rao@linux.vnet.ibm.com Subject: [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power Date: Mon, 26 Oct 2015 18:14:06 +0530 Message-Id: <1445863448-5746-2-git-send-email-anju@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1445863448-5746-1-git-send-email-anju@linux.vnet.ibm.com> References: <1445863448-5746-1-git-send-email-anju@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15102612-0005-0000-0000-000002A45043 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The enum definition assigns an 'id' to each register in "struct pt_regs" of arch/powerpc.The order of these values in the enum definition are based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h . Signed-off-by: Anju T --- arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h new file mode 100644 index 0000000..b97727c --- /dev/null +++ b/arch/powerpc/include/uapi/asm/perf_regs.h @@ -0,0 +1,55 @@ +#ifndef _ASM_POWERPC_PERF_REGS_H +#define _ASM_POWERPC_PERF_REGS_H + +enum perf_event_powerpc_regs { + PERF_REG_POWERPC_GPR0, + PERF_REG_POWERPC_GPR1, + PERF_REG_POWERPC_GPR2, + PERF_REG_POWERPC_GPR3, + PERF_REG_POWERPC_GPR4, + PERF_REG_POWERPC_GPR5, + PERF_REG_POWERPC_GPR6, + PERF_REG_POWERPC_GPR7, + PERF_REG_POWERPC_GPR8, + PERF_REG_POWERPC_GPR9, + PERF_REG_POWERPC_GPR10, + PERF_REG_POWERPC_GPR11, + PERF_REG_POWERPC_GPR12, + PERF_REG_POWERPC_GPR13, + PERF_REG_POWERPC_GPR14, + PERF_REG_POWERPC_GPR15, + PERF_REG_POWERPC_GPR16, + PERF_REG_POWERPC_GPR17, + PERF_REG_POWERPC_GPR18, + PERF_REG_POWERPC_GPR19, + PERF_REG_POWERPC_GPR20, + PERF_REG_POWERPC_GPR21, + PERF_REG_POWERPC_GPR22, + PERF_REG_POWERPC_GPR23, + PERF_REG_POWERPC_GPR24, + PERF_REG_POWERPC_GPR25, + PERF_REG_POWERPC_GPR26, + PERF_REG_POWERPC_GPR27, + PERF_REG_POWERPC_GPR28, + PERF_REG_POWERPC_GPR29, + PERF_REG_POWERPC_GPR30, + PERF_REG_POWERPC_GPR31, + PERF_REG_POWERPC_NIP, + PERF_REG_POWERPC_MSR, + PERF_REG_POWERPC_ORIG_R3, + PERF_REG_POWERPC_CTR, + PERF_REG_POWERPC_LNK, + PERF_REG_POWERPC_XER, + PERF_REG_POWERPC_CCR, +#ifdef __powerpc64__ + PERF_REG_POWERPC_SOFTE, +#else + PERF_REG_POWERPC_MQ, +#endif + PERF_REG_POWERPC_TRAP, + PERF_REG_POWERPC_DAR, + PERF_REG_POWERPC_DSISR, + PERF_REG_POWERPC_RESULT, + PERF_REG_POWERPC_MAX, +}; +#endif /* _ASM_POWERPC_PERF_REGS_H */ -- 2.1.0