From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759169AbbJ3I0X (ORCPT ); Fri, 30 Oct 2015 04:26:23 -0400 Received: from regular1.263xmail.com ([211.150.99.134]:54115 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758659AbbJ3IZM (ORCPT ); Fri, 30 Oct 2015 04:25:12 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 1 X-RL-SENDER: zain.wang@rock-chips.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: zain.wang@rock-chips.com X-UNIQUE-TAG: <02d952a755cab52e94bb08f68f504ae0> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Zain Wang To: zhengsq@rock-chips.com, hl@rock-chips.com, herbert@gondor.apana.org.au, davem@davemloft.net, mturquette@baylibre.com, heiko@sntech.de, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, robh+dt@kernel.org, galak@codeaurora.org, linux@arm.linux.org.uk, mark.rutland@arm.com Cc: linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, eddie.cai@rock-chips.com, Zain Wang Subject: [RESEND PATCH 3/4] ARM: dts: rockchip: Add Crypto drivers for rk3288 Date: Fri, 30 Oct 2015 16:22:48 +0800 Message-Id: <1446193369-4453-4-git-send-email-zain.wang@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1446193369-4453-1-git-send-email-zain.wang@rock-chips.com> References: <1446193369-4453-1-git-send-email-zain.wang@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add Crypto drivers for rk3288 including crypto controller and dma clk. Signed-off-by: Zain Wang --- arch/arm/boot/dts/rk3288.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 6a79c9c..1706706 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -170,6 +170,22 @@ }; }; + crypto: cypto-controller@ff8a0000 { + compatible = "rockchip,crypto"; + reg = <0xff8a0000 0x4000>; + interrupts = ; + clocks = <&cru ACLK_CRYPTO>, + <&cru HCLK_CRYPTO>, + <&cru SRST_CRYPTO>, + <&cru ACLK_DMAC1>; + + clock-names = "aclk_crypto", + "hclk_crypto", + "srst_crypto", + "apb_pclk"; + status = "okay"; + }; + reserved-memory { #address-cells = <1>; #size-cells = <1>; -- 1.9.1