From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756521AbbKSQWw (ORCPT ); Thu, 19 Nov 2015 11:22:52 -0500 Received: from mga03.intel.com ([134.134.136.65]:12315 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751806AbbKSQWv (ORCPT ); Thu, 19 Nov 2015 11:22:51 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,318,1444719600"; d="scan'208";a="603368017" From: Andy Shevchenko To: linux-kernel@vger.kernel.org, David Woodhouse , iommu@lists.linux-foundation.org Cc: Andy Shevchenko Subject: [PATCH v2 1/1] iommu/vt-d: use lo_hi_readq() / lo_hi_writeq() Date: Thu, 19 Nov 2015 18:22:47 +0200 Message-Id: <1447950167-111241-1-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.6.2 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There is already helper functions to do 64-bit I/O on 32-bit machines or buses, thus we don't need to reinvent the wheel. Signed-off-by: Andy Shevchenko --- Cahngelog v2: - rebase on top of recent linux-next include/linux/intel-iommu.h | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-) diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 821273c..34066ee 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -29,6 +29,8 @@ #include #include #include +#include + #include #include @@ -71,24 +73,8 @@ #define OFFSET_STRIDE (9) -#ifdef CONFIG_64BIT #define dmar_readq(a) readq(a) #define dmar_writeq(a,v) writeq(v,a) -#else -static inline u64 dmar_readq(void __iomem *addr) -{ - u32 lo, hi; - lo = readl(addr); - hi = readl(addr + 4); - return (((u64) hi) << 32) + lo; -} - -static inline void dmar_writeq(void __iomem *addr, u64 val) -{ - writel((u32)val, addr); - writel((u32)(val >> 32), addr + 4); -} -#endif #define DMAR_VER_MAJOR(v) (((v) & 0xf0) >> 4) #define DMAR_VER_MINOR(v) ((v) & 0x0f) -- 2.6.2