From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752820AbbKZNvR (ORCPT ); Thu, 26 Nov 2015 08:51:17 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:57988 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752045AbbKZNrs (ORCPT ); Thu, 26 Nov 2015 08:47:48 -0500 X-AuditID: cbfee68f-f79666d0000076bb-ba-56570d7d71a1 From: Chanwoo Choi To: myungjoo.ham@samsung.com, kyungmin.park@samsung.com, kgene@kernel.org, k.kozlowski@samsung.com Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, cw00.choi@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: [RFC PATCH 11/15] ARM: dts: Add bus nodes using VDD_INT for Exynos3250 Date: Thu, 26 Nov 2015 22:47:35 +0900 Message-id: <1448545659-32287-12-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1448545659-32287-1-git-send-email-cw00.choi@samsung.com> References: <1448545659-32287-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprGIsWRmVeSWpSXmKPExsWyRsSkQLeWNzzM4PsvQ4vrX56zWsw/co7V ov/NQlaLc69WMlq8fmFo0f/4NbPF2aY37BaXd81hs/jce4TRYsb5fUwWty/zWiy9fhHIaFzB ZjFh+loWi9a9R9gt2lZ/YHUQ8Fgzbw2jR0tzD5vH5b5eJo+Vy7+weWxa1cnm8e8Yu0ffllWM Hp83yQVwRHHZpKTmZJalFunbJXBlLN7ym6lgoXLFqocb2BsY90p1MXJySAiYSHz8/osdwhaT uHBvPVsXIxeHkMAKRokrE/awwhR1bT/OBJFYyiixcvVnZgjnC6PE2bMX2ECq2AS0JPa/uAFm iwikSPy9OZsRpIhZ4BCTxJl3R5hAEsIC/hJP9/QygtgsAqoSx07uBVvBK+Am0XnvECPEOjmJ D3segd3ECRQ/dWUSWFxIwFVi8scesPskBD6ySyw4N4MZYpCAxLfJh1i6GDmAErISmw4wQ8yR lDi44gbLBEbhBYwMqxhFUwuSC4qT0ouM9YoTc4tL89L1kvNzNzECo+v0v2f9OxjvHrA+xCjA wajEw1tgGxYmxJpYVlyZe4jRFGjDRGYp0eR8YAznlcQbGpsZWZiamBobmVuaKYnzLpT6GSwk kJ5YkpqdmlqQWhRfVJqTWnyIkYmDU6qB0fkjg9MC502qV5YtnpS1QXFJ0sIb6Q+lbrL0uyas CzyiZyv0V7FIXrtNdatG1Y73ut+WGbWuWJXXLNZ5+ermKzMusOaLK068ps9gfcJVUeTdqUPX HlycpXdGxFDoelDPrcmr2VUOJzwyy7+lu+jL3Jf7TvRo/PX8XWuhoL2oxd3Y6c1jjnlR4kos xRmJhlrMRcWJAIRzGOqpAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMIsWRmVeSWpSXmKPExsVy+t9jAd1a3vAwg39btC2uf3nOajH/yDlW i/43C1ktzr1ayWjx+oWhRf/j18wWZ5vesFtc3jWHzeJz7xFGixnn9zFZ3L7Ma7H0+kUgo3EF m8WE6WtZLFr3HmG3aFv9gdVBwGPNvDWMHi3NPWwel/t6mTxWLv/C5rFpVSebx79j7B59W1Yx enzeJBfAEdXAaJORmpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGtoaWGupJCXmJtqq+TiE6Dr lpkD9ICSQlliTilQKCCxuFhJ3w7ThNAQN10LmMYIXd+QILgeIwM0kLCGMWPxlt9MBQuVK1Y9 3MDewLhXqouRk0NCwESia/txJghbTOLCvfVsXYxcHEICSxklVq7+zAzhfGGUOHv2AhtIFZuA lsT+FzfAbBGBFIm/N2czghQxCxxikjjz7gjYKGEBf4mne3oZQWwWAVWJYyf3soLYvAJuEp33 DjFCrJOT+LDnETuIzQkUP3VlElhcSMBVYvLHHrYJjLwLGBlWMUqkFiQXFCel5xrlpZbrFSfm Fpfmpesl5+duYgRH8DPpHYyHd7kfYhTgYFTi4S2wDQsTYk0sK67MPcQowcGsJMJ7iyU8TIg3 JbGyKrUoP76oNCe1+BCjKdBhE5mlRJPzgcklryTe0NjEzMjSyNzQwsjYXEmc98J+vzAhgfTE ktTs1NSC1CKYPiYOTqkGxsmxNyfevPdnq5JSy8L9H1qYap+71+xuOay57uofporpfK2iN9TK GOo5UoKjZuc+/auu2rq04PppD4U6EcZI3yyekoSXUZ1ssYuq9SU787bIvDpQ23n04pzJ9/u/ OG1KX+rwsW/7/V2l69lfdhk9OfcpXzjuXkL5jEVvrztZHAvuL0xOnPmhUomlOCPRUIu5qDgR AE9lXyv2AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the bus nodes using VDD_INT for Exynos3250 SoC. Exynos3250 has following AXI buses to translate data between DRAM and sub-blocks. Following list specifies the detailed relation between DRAM and sub-blocks: - ACLK400 clock for MCUISP - ACLK266 clock for ISP - ACLK200 clock for FSYS - ACLK160 clock for LCD0 - ACLK100 clock for PERIL - GDL clock for LEFTBUS - GDR clock for RIGHTBUS Signed-off-by: Chanwoo Choi --- arch/arm/boot/dts/exynos3250.dtsi | 152 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 152 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 45809f83c628..2e5d60c24004 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -734,6 +734,158 @@ opp-microvolt = <875000>; }; }; + + bus_leftbus: bus_leftbus { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_GDL>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_rightbus: bus_rightbus { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_GDR>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_lcd0: bus_lcd0 { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_160>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_fsys: bus_fsys { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_200>; + clock-names = "bus"; + operating-points-v2 = <&bus_leftbus_opp_table>; + status = "disabled"; + }; + + bus_mcuisp: bus_mcuisp { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>; + clock-names = "bus"; + operating-points-v2 = <&bus_mcuisp_opp_table>; + status = "disabled"; + }; + + bus_isp: bus_isp { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_266>; + clock-names = "bus"; + operating-points-v2 = <&bus_isp_opp_table>; + status = "disabled"; + }; + + bus_peril: bus_peril { + compatible = "samsung,exynos-bus"; + clocks = <&cmu CLK_DIV_ACLK_100>; + clock-names = "bus"; + operating-points-v2 = <&bus_peril_opp_table>; + status = "disabled"; + }; + + bus_leftbus_opp_table: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + opp03 { + opp-hz = /bits/ 64 <133000000>; + opp-microvolt = <1000000>; + }; + opp04 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_mcuisp_opp_table: opp_table2 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + opp03 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + opp04 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_isp_opp_table: opp_table3 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + opp03 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1000000>; + }; + opp04 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1000000>; + }; + }; + + bus_peril_opp_table: opp_table4 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <80000000>; + opp-microvolt = <900000>; + }; + opp02 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1000000>; + }; + }; }; }; -- 1.9.1