From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753209AbbLIEJS (ORCPT ); Tue, 8 Dec 2015 23:09:18 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:36773 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751444AbbLIEIS (ORCPT ); Tue, 8 Dec 2015 23:08:18 -0500 X-AuditID: cbfee690-f79646d000001316-c9-5667a92fd876 From: Chanwoo Choi To: myungjoo.ham@samsung.com, k.kozlowski@samsung.com, kgene@kernel.org Cc: kyungmin.park@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, linux.amoon@gmail.com, cw00.choi@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 02/19] PM / devfreq: exynos: Add documentation for generic exynos bus frequency driver Date: Wed, 09 Dec 2015 13:07:54 +0900 Message-id: <1449634091-1842-3-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> References: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHIsWRmVeSWpSXmKPExsWyRsSkQFd/ZXqYweKDZhbXvzxntZh/5Byr Rf+bhawW516tZLR4/cLQov/xa2aLs01v2C0u75rDZvG59wijxYzz+5gs1m28xW5x+zKvxdLr F5ksbjeuYLOYMH0ti0Xr3iPsFm2rP7A6CHqsmbeG0aOluYfN43JfL5PHzll32T1WLv/C5rFp VSebx79j7B59W1YxenzeJBfAGcVlk5Kak1mWWqRvl8CV0dTRxlRwWq5i5h2JBsYrEl2MnBwS AiYSjw/2M0HYYhIX7q1n62Lk4hASWMEocfzmISaYoo17XzFCJGYxSsxYdwTK+cIo8flaKxtI FZuAlsT+FzfAbBEBd4mv93aDjWIW+MIk0Tr5O3MXIweHsEC2xMR5oSA1LAKqEru77oNt4BVw kTi/bzXUNjmJD3sesYPYnAKuEle2v2MEsYWAao49bWICmSkh0MghcXTOZFaIQQIS3yYfYgGZ LyEgK7HpADPEHEmJgytusExgFF7AyLCKUTS1ILmgOCm9yESvODG3uDQvXS85P3cTIzDaTv97 NmEH470D1ocYBTgYlXh4L7ikhwmxJpYVV+YeYjQF2jCRWUo0OR8Y03kl8YbGZkYWpiamxkbm lmZK4ryvpX4GCwmkJ5akZqemFqQWxReV5qQWH2Jk4uCUamBMm1zTYanm6bdk52u51IXbs89e Elg4v4p9vc6UhxPrHWZLxWk8cjewYbI60B3pcciWiTFm6Waxmw/2z2pKiSx5yX0lkF9yV8+E GY/s302vmFtR+rTn9of3MRsDWGRuHihIyP/07vP+0taPUc7mljdZldZ9tuTxeRscYnfydV2E +sfeSo3S11+UWIozEg21mIuKEwHf5rVysQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNIsWRmVeSWpSXmKPExsVy+t9jQV39lelhBj9f6Vtc//Kc1WL+kXOs Fv1vFrJanHu1ktHi9QtDi/7Hr5ktzja9Ybe4vGsOm8Xn3iOMFjPO72OyWLfxFrvF7cu8Fkuv X2SyuN24gs1iwvS1LBate4+wW7St/sDqIOixZt4aRo+W5h42j8t9vUweO2fdZfdYufwLm8em VZ1sHv+OsXv0bVnF6PF5k1wAZ1QDo01GamJKapFCal5yfkpmXrqtkndwvHO8qZmBoa6hpYW5 kkJeYm6qrZKLT4CuW2YO0CtKCmWJOaVAoYDE4mIlfTtME0JD3HQtYBojdH1DguB6jAzQQMIa xoymjjamgtNyFTPvSDQwXpHoYuTkkBAwkdi49xUjhC0mceHeerYuRi4OIYFZjBIz1h1hhHC+ MEp8vtbKBlLFJqAlsf/FDTBbRMBd4uu93WAdzAJfmCRaJ39n7mLk4BAWyJaYOC8UpIZFQFVi d9d9JhCbV8BF4vy+1UwQ2+QkPux5xA5icwq4SlzZ/g7sCiGgmmNPm5gmMPIuYGRYxSiRWpBc UJyUnmuYl1quV5yYW1yal66XnJ+7iREc0c+kdjAe3OV+iFGAg1GJh/eCS3qYEGtiWXFl7iFG CQ5mJRFerVqgEG9KYmVValF+fFFpTmrxIUZToMMmMkuJJucDk01eSbyhsYmZkaWRuaGFkbG5 kjhv7aXIMCGB9MSS1OzU1ILUIpg+Jg5OqQZGS/NFfwpEZq6YtCEtaMmJwPm3qlImry5b2vNr 6yzvSxsCZIz3LzS6sP7ABOUPhtvip7ZZJz10UZtYHt9uEnus08Kk5+qDa/opxlLL1JMXHNve GHf1OeddO+ktwZ8V11r73WYIdcl8P2Wf5jqZayd2CqtKfnA8sfrgwaN8MS0n/8jVzU57wJXb rMRSnJFoqMVcVJwIAOdB6nv+AgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the documentation for generic exynos bus frequency driver. Signed-off-by: Chanwoo Choi --- .../devicetree/bindings/devfreq/exynos-bus.txt | 94 ++++++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt new file mode 100644 index 000000000000..54a1f9c46c88 --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt @@ -0,0 +1,94 @@ +* Generic Exynos Bus frequency device + +The Samsung Exynos SoC have many buses for data transfer between DRAM +and sub-blocks in SoC. Almost Exynos SoC have the common architecture +for buses. Generally, the each bus of Exynos SoC includes the source clock +and power line and then is able to change the clock according to the usage +of each buses on runtime. When gathering the usage of each buses on runtime, +thie driver uses the PPMU (Platform Performance Monitoring Unit) which +is able to measure the current load of sub-blocks. + +There are a little different composition among Exynos SoC because each Exynos +SoC has the different sub-blocks. So, this difference should be specified +in devicetree file instead of each device driver. In result, this driver +is able to support the bus frequency for all Exynos SoCs. + +Required properties for bus device: +- compatible: Should be "samsung,exynos-bus". +- clock-names : the name of clock used by the bus, "bus". +- clocks : phandles for clock specified in "clock-names" property. +- #clock-cells: should be 1. +- operating-points-v2: the OPP table including frequency/voltage information + to support DVFS (Dynamic Voltage/Frequency Scaling) feature. +- vdd-supply: the regulator to provide the buses with the voltage. +- devfreq-events: the devfreq-event device to monitor the curret utilization + of buses. + +Optional properties for bus device: +- exynos,saturation-ratio: the percentage value which is used to calibrate + the performance count againt total cycle count. + +Example1: + Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to + power line (regulator). The MIF (Memory Interface) AXI bus is used to + transfer data between DRAM and CPU and uses the VDD_MIF regualtor. + + - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block + + - MIF bus's frequency/voltage table + ----------------------- + |Lv| Freq | Voltage | + ----------------------- + |L1| 50000 |800000 | + |L2| 100000 |800000 | + |L3| 134000 |800000 | + |L4| 200000 |800000 | + |L5| 400000 |875000 | + ----------------------- + +Example2 : + The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi + are listed below: + + bus_dmc: bus_dmc { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_dmc CLK_DIV_DMC>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + status = "disabled"; + }; + + bus_dmc_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <50000000>; + opp-microvolt = <800000>; + }; + opp01 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <800000>; + }; + opp02 { + opp-hz = /bits/ 64 <134000000>; + opp-microvolt = <800000>; + }; + opp03 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <800000>; + }; + opp04 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <875000>; + }; + }; + + Usage case to handle the frequency and voltage of bus on runtime + in exynos3250-rinato.dts are listed below: + + &bus_dmc { + devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; + vdd-supply = <&buck1_reg>; /* VDD_MIF */ + status = "okay"; + }; -- 1.9.1