[PATCH v2 0/2] Add vector-hashing support for lowest-priority interrupts delivery

[Feng Wu <feng.wu@intel.com>]

This series add vector-hashing support for lowest-priority interrupts
delivery. As an example, modern Intel CPUs in server platform can use
this method to handle lowest-priority interrupts.

v2:
- Add vector-hashing support for non-vt-d PI case
- Fix some bugs Radim pointed out in v1
- Use a module parameter to control the vector-hashing mechanism

Feng Wu (2):
  KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
  KVM: x86: Add lowest-priority support for vt-d posted-interrupts

 arch/x86/kvm/irq_comm.c |  27 +++++++++--
 arch/x86/kvm/lapic.c    | 124 ++++++++++++++++++++++++++++++++++++++++++++----
 arch/x86/kvm/lapic.h    |   4 ++
 arch/x86/kvm/vmx.c      |  12 ++++-
 arch/x86/kvm/x86.c      |   9 ++++
 arch/x86/kvm/x86.h      |   1 +
 6 files changed, 160 insertions(+), 17 deletions(-)

-- 
2.1.0