From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933514AbbLVTaW (ORCPT ); Tue, 22 Dec 2015 14:30:22 -0500 Received: from mail-bn1on0087.outbound.protection.outlook.com ([157.56.110.87]:41604 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932094AbbLVTaS (ORCPT ); Tue, 22 Dec 2015 14:30:18 -0500 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Suravee.Suthikulpanit@amd.com; From: Suravee Suthikulpanit To: , , , , CC: , , Suravee Suthikulpanit Subject: [PATCH 0/6] perf/amd/iommu: Enable multi-IOMMU support Date: Tue, 22 Dec 2015 13:19:11 -0600 Message-ID: <1450811957-1511-1-git-send-email-Suravee.Suthikulpanit@amd.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: BY2PR04CA0009.namprd04.prod.outlook.com (10.255.247.19) To CY1PR12MB0444.namprd12.prod.outlook.com (25.163.91.22) X-Microsoft-Exchange-Diagnostics: 1;CY1PR12MB0444;2:Y44NnvpM4NQJ68mT3ylkTdpBUiQ6NmDdbrKza05FWjM6U/HM8mk9ho4YLrOIPtHinIMK9LzMK9HfAwz5dhj1OgOgG1gVKEPMHWRuwIj2Xr2VQEVsdhsbGsxpyS/ie4uapEaoB7DCzrlD/oXOY4de+g==;3:ef4GG08jCoF/jZ96CTPEgQQGz5OW9/tAHqqwWz6TKNGeiPxuHhFWphTJKBJA/icBNwc1qmw1D373G/pns0sWJ7MGUc3Gh2aSTuJ47qzfp7y9L3MSnb6L0gF8RGl/+jX1;25:hqjVWb4K4N0nq0VmYKtvTVoZigb6pYKNetByqs5TBf03HDlzJgIaDX3ypUPpCPLCM0qDqrv5wL6to/v8rIGdA334bc2870fjPTx4rI5M02x9cM0z8V/xDk3AgC09hJk2qwgu4+Akv/PRL5Ymi0SbIXvlvqggOrKKb8s3n5m8yPEZU/eGdZmvKn5CjZ2pPM8z+tPWFiZHFMJ1a3NoadWzsH088FDsCrW62c8m9iOHoHUTyBrc/J9ox+25FfaGXO3FLUDRQmpHILMKUBK7hnEMZg== X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:CY1PR12MB0444; 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It introduces new AMD IOMMU APIs, which will are used by the AMD IOMMU Perf driver to access performance counters in multiple IOMMUs. In addition, this series should also fix current AMD IOMMU PMU driver initialization issue in some existing CZ platform. Suravee Suthikulpanit (6): perf/amd/iommu: Consolidate and move perf_event_amd_iommu header perf/amd/iommu: Modify functions to query max banks and counters iommu/amd: Introduce amd_iommu_get_num_iommus() perf/amd/iommu: Introduce data structure for tracking prev count. perf/amd/iommu: Introduce get_iommu_bnk_cnt_evt_idx perf/amd/iommu: Enable support for multiple IOMMUs arch/x86/kernel/cpu/perf_event_amd_iommu.c | 145 +++++++++++++++++++---------- arch/x86/kernel/cpu/perf_event_amd_iommu.h | 40 -------- drivers/iommu/amd_iommu_init.c | 125 +++++++++++++++++++++---- drivers/iommu/amd_iommu_proto.h | 7 -- include/linux/perf/perf_event_amd_iommu.h | 43 +++++++++ 5 files changed, 248 insertions(+), 112 deletions(-) delete mode 100644 arch/x86/kernel/cpu/perf_event_amd_iommu.h create mode 100644 include/linux/perf/perf_event_amd_iommu.h -- 1.9.1