From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754201AbcAEGbq (ORCPT ); Tue, 5 Jan 2016 01:31:46 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:54867 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754044AbcAEGar (ORCPT ); Tue, 5 Jan 2016 01:30:47 -0500 X-Listener-Flag: 11101 From: James Liao To: Matthias Brugger , Mike Turquette , Stephen Boyd CC: Sascha Hauer , Daniel Kurtz , Philipp Zabel , , , , , , , Shunli Wang Subject: [PATCH v2 6/6] reset: mediatek: mt2701 reset driver Date: Tue, 5 Jan 2016 14:30:22 +0800 Message-ID: <1451975422-31174-7-git-send-email-jamesjj.liao@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1451975422-31174-1-git-send-email-jamesjj.liao@mediatek.com> References: <1451975422-31174-1-git-send-email-jamesjj.liao@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang --- drivers/clk/mediatek/clk-mt2701.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c index 2f521f4..39472e4 100644 --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c @@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(struct device_node *node) if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); + + mtk_register_reset_controller(node, 2, 0x30); } CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init); @@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(struct device_node *node) if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); + + mtk_register_reset_controller(node, 2, 0x0); } CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init); -- 1.9.1