From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934203AbcALIbe (ORCPT ); Tue, 12 Jan 2016 03:31:34 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:37127 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S934113AbcALIba (ORCPT ); Tue, 12 Jan 2016 03:31:30 -0500 From: James Liao To: Matthias Brugger , Mike Turquette , Stephen Boyd , John Crispin CC: Sascha Hauer , Daniel Kurtz , Philipp Zabel , , , , , , , Shunli Wang , James Liao Subject: [PATCH v3 6/6] reset: mediatek: Add MT2701 reset driver Date: Tue, 12 Jan 2016 16:31:10 +0800 Message-ID: <1452587470-61506-7-git-send-email-jamesjj.liao@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1452587470-61506-1-git-send-email-jamesjj.liao@mediatek.com> References: <1452587470-61506-1-git-send-email-jamesjj.liao@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Shunli Wang In infrasys and perifsys, there are many reset control bits for kinds of modules. These bits are used as actual reset controllers to be registered into kernel's generic reset controller framework. Signed-off-by: Shunli Wang Signed-off-by: James Liao --- drivers/clk/mediatek/clk-mt2701.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c index 1061715..4b64644 100644 --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c @@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(struct device_node *node) if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); + + mtk_register_reset_controller(node, 2, 0x30); } CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init); @@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(struct device_node *node) if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); + + mtk_register_reset_controller(node, 2, 0x0); } CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init); @@ -996,6 +1000,8 @@ static void __init mtk_hifsys_init(struct device_node *node) if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); + + mtk_register_reset_controller(node, 1, 0x34); } CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init); -- 1.9.1