From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754723AbcAOUMF (ORCPT ); Fri, 15 Jan 2016 15:12:05 -0500 Received: from mga01.intel.com ([192.55.52.88]:42621 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754528AbcAOUMA (ORCPT ); Fri, 15 Jan 2016 15:12:00 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,301,1449561600"; d="scan'208";a="891346643" From: Andy Shevchenko To: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , linux-kernel@vger.kernel.org, Mika Westerberg Cc: Andy Shevchenko Subject: [PATCH v1 2/2] x86/platform/intel-mid: Join string and fix SoC name Date: Fri, 15 Jan 2016 22:11:08 +0200 Message-Id: <1452888668-147116-2-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.7.0.rc3 In-Reply-To: <1452888668-147116-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1452888668-147116-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Join string back to make grepping a bit easier. While here, lowering case for Penwell SoC name in one case to be aligned with the rest messages. Signed-off-by: Andy Shevchenko --- arch/x86/platform/intel-mid/intel-mid.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c index 1bbc21e..90bb997 100644 --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -138,7 +138,7 @@ static void intel_mid_arch_setup(void) intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip](); else { intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL](); - pr_info("ARCH: Unknown SoC, assuming PENWELL!\n"); + pr_info("ARCH: Unknown SoC, assuming Penwell!\n"); } out: @@ -214,12 +214,10 @@ static inline int __init setup_x86_intel_mid_timer(char *arg) else if (strcmp("lapic_and_apbt", arg) == 0) intel_mid_timer_options = INTEL_MID_TIMER_LAPIC_APBT; else { - pr_warn("X86 INTEL_MID timer option %s not recognised" - " use x86_intel_mid_timer=apbt_only or lapic_and_apbt\n", - arg); + pr_warn("X86 INTEL_MID timer option %s not recognised use x86_intel_mid_timer=apbt_only or lapic_and_apbt\n", + arg); return -EINVAL; } return 0; } __setup("x86_intel_mid_timer=", setup_x86_intel_mid_timer); - -- 2.7.0.rc3