From: Chen-Yu Tsai <wens@csie.org>
To: Ulf Hansson <ulf.hansson@linaro.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: [PATCH RFC 07/15] mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support
Date: Thu, 21 Jan 2016 13:26:34 +0800 [thread overview]
Message-ID: <1453354002-28366-8-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1453354002-28366-1-git-send-email-wens@csie.org>
Now that clock delay settings for 8 bit DDR are correct, and vqmmc
support is available, we can enable MMC_CAP_1_8V_DDR support. This
enables MMC HS-DDR at up to 52 MHz, even if signal voltage switching
is not available.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
drivers/mmc/host/sunxi-mmc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index d05928091b34..f3a7f36e38c2 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1145,6 +1145,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
mmc->f_min = 400000;
mmc->f_max = 50000000;
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
+ MMC_CAP_1_8V_DDR |
MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
ret = mmc_of_parse(mmc);
--
2.7.0.rc3
next prev parent reply other threads:[~2016-01-21 5:33 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-21 5:26 [PATCH RFC 00/15] mmc: sunxi: Support vqmmc regulator and eMMC DDR modes Chen-Yu Tsai
2016-01-21 5:26 ` [PATCH RFC 01/15] mmc: sunxi: Document host init sequence Chen-Yu Tsai
2016-01-29 11:39 ` Ulf Hansson
2016-01-21 5:26 ` [PATCH RFC 02/15] mmc: sunxi: Return error on mmc_regulator_set_ocr() fail in .set_ios op Chen-Yu Tsai
2016-01-29 11:40 ` Ulf Hansson
2016-01-21 5:26 ` [PATCH RFC 03/15] mmc: sunxi: Block signal voltage switching (CMD11) Chen-Yu Tsai
2016-01-29 10:42 ` Ulf Hansson
2016-01-29 14:44 ` Chen-Yu Tsai
2016-01-21 5:26 ` [PATCH RFC 04/15] mmc: sunxi: Support vqmmc regulator Chen-Yu Tsai
2016-01-29 11:40 ` Ulf Hansson
2016-01-21 5:26 ` [PATCH RFC 05/15] mmc: sunxi: Support MMC_DDR52 timing modes Chen-Yu Tsai
2016-01-21 11:14 ` Hans de Goede
2016-01-21 11:55 ` Chen-Yu Tsai
2016-01-21 12:26 ` Hans de Goede
2016-01-21 5:26 ` [PATCH RFC 06/15] mmc: sunxi: Support 8 bit eMMC DDR transfer modes Chen-Yu Tsai
2016-01-21 5:26 ` Chen-Yu Tsai [this message]
2016-01-21 5:26 ` [PATCH RFC 08/15] ARM: dts: sun6i: Add mmc3 pins for 8 bit emmc Chen-Yu Tsai
2016-01-22 20:31 ` Maxime Ripard
2016-01-23 11:04 ` Chen-Yu Tsai
2016-01-24 16:54 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Chen-Yu Tsai
2016-01-21 11:16 ` Hans de Goede
2016-01-21 12:23 ` Chen-Yu Tsai
2016-01-21 12:25 ` Hans de Goede
2016-01-21 12:28 ` Chen-Yu Tsai
2016-01-21 12:38 ` Hans de Goede
2016-01-22 20:39 ` Maxime Ripard
2016-01-23 4:21 ` Chen-Yu Tsai
2016-01-24 16:56 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 10/15] ARM: dts: sun8i: Include SDC2_RST pin in mmc2_8bit_pins Chen-Yu Tsai
2016-01-24 16:58 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 11/15] ARM: dts: sun8i: sina33: Enable hardware reset and HS-DDR for eMMC Chen-Yu Tsai
2016-01-22 20:42 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 12/15] ARM: dts: sun9i: Use sun9i specific mmc compatible Chen-Yu Tsai
2016-01-22 20:44 ` Maxime Ripard
2016-01-23 10:50 ` Chen-Yu Tsai
2016-01-21 5:26 ` [PATCH RFC 13/15] ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pins Chen-Yu Tsai
2016-01-24 16:58 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 14/15] ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC Chen-Yu Tsai
2016-01-24 16:59 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 15/15] ARM: dts: sun9i: cubieboard4: " Chen-Yu Tsai
2016-01-24 16:59 ` Maxime Ripard
2016-01-21 11:19 ` [PATCH RFC 00/15] mmc: sunxi: Support vqmmc regulator and eMMC DDR modes Hans de Goede
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1453354002-28366-8-git-send-email-wens@csie.org \
--to=wens@csie.org \
--cc=hdegoede@redhat.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-sunxi@googlegroups.com \
--cc=maxime.ripard@free-electrons.com \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome