From: John Garry <john.garry@huawei.com>
To: <JBottomley@odin.com>, <martin.petersen@oracle.com>,
<robh+dt@kernel.org>, <pawel.moll@arm.com>,
<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
<galak@codeaurora.org>
Cc: <linuxarm@huawei.com>, <zhangfei.gao@linaro.org>,
<xuwei5@hisilicon.com>, <john.garry2@mail.dcu.ie>,
<linux-scsi@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<arnd@arndb.de>, <devicetree@vger.kernel.org>,
John Garry <john.garry@huawei.com>
Subject: [RESEND PATCH v2 11/23] hisi_sas: add v2 phy init code
Date: Tue, 26 Jan 2016 02:47:11 +0800 [thread overview]
Message-ID: <1453747643-61875-12-git-send-email-john.garry@huawei.com> (raw)
In-Reply-To: <1453747643-61875-1-git-send-email-john.garry@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
---
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 49 ++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
index 6f05333..1990d65 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
@@ -288,6 +288,15 @@ static u32 hisi_sas_phy_read32(struct hisi_hba *hisi_hba,
return readl(regs);
}
+static void config_phy_opt_mode_v2_hw(struct hisi_hba *hisi_hba, int phy_no)
+{
+ u32 cfg = hisi_sas_phy_read32(hisi_hba, phy_no, PHY_CFG);
+
+ cfg &= ~PHY_CFG_DC_OPT_MSK;
+ cfg |= 1 << PHY_CFG_DC_OPT_OFF;
+ hisi_sas_phy_write32(hisi_hba, phy_no, PHY_CFG, cfg);
+}
+
static void config_id_frame_v2_hw(struct hisi_hba *hisi_hba, int phy_no)
{
struct sas_identify_frame identify_frame;
@@ -563,6 +572,44 @@ static int hw_init_v2_hw(struct hisi_hba *hisi_hba)
return 0;
}
+static void enable_phy_v2_hw(struct hisi_hba *hisi_hba, int phy_no)
+{
+ u32 cfg = hisi_sas_phy_read32(hisi_hba, phy_no, PHY_CFG);
+
+ cfg |= PHY_CFG_ENA_MSK;
+ hisi_sas_phy_write32(hisi_hba, phy_no, PHY_CFG, cfg);
+}
+
+static void start_phy_v2_hw(struct hisi_hba *hisi_hba, int phy_no)
+{
+ config_id_frame_v2_hw(hisi_hba, phy_no);
+ config_phy_opt_mode_v2_hw(hisi_hba, phy_no);
+ enable_phy_v2_hw(hisi_hba, phy_no);
+}
+
+static void start_phys_v2_hw(unsigned long data)
+{
+ struct hisi_hba *hisi_hba = (struct hisi_hba *)data;
+ int i;
+
+ for (i = 0; i < hisi_hba->n_phy; i++)
+ start_phy_v2_hw(hisi_hba, i);
+}
+
+static void phys_init_v2_hw(struct hisi_hba *hisi_hba)
+{
+ int i;
+ struct timer_list *timer = &hisi_hba->timer;
+
+ for (i = 0; i < hisi_hba->n_phy; i++) {
+ hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x6a);
+ hisi_sas_phy_read32(hisi_hba, i, CHL_INT2_MSK);
+ }
+
+ setup_timer(timer, start_phys_v2_hw, (unsigned long)hisi_hba);
+ mod_timer(timer, jiffies + HZ);
+}
+
static int hisi_sas_v2_init(struct hisi_hba *hisi_hba)
{
int rc;
@@ -571,6 +618,8 @@ static int hisi_sas_v2_init(struct hisi_hba *hisi_hba)
if (rc)
return rc;
+ phys_init_v2_hw(hisi_hba);
+
return 0;
}
--
1.9.1
next prev parent reply other threads:[~2016-01-25 18:45 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-25 18:47 [RESEND PATCH v2 00/23] HiSilicon SAS v2 hw support John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 01/23] devicetree: bindings: hisi_sas: add v2 HW bindings John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 02/23] hisi_sas: relocate DEV_IS_EXPANDER John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 03/23] hisi_sas: set max commands as configurable John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 04/23] hisi_sas: reduce max itct entries John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 05/23] hisi_sas: add hisi_sas_err_record_v1 John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 06/23] hisi_sas: rename some fields in hisi_sas_itct John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 07/23] hisi_sas: add bare v2 hw driver John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 08/23] hisi_sas: add v2 register definitions John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 09/23] hisi_sas: add v2 hw init John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 10/23] hisi_sas: add init_id_frame_v2_hw() John Garry
2016-01-25 18:47 ` John Garry [this message]
2016-01-25 18:47 ` [RESEND PATCH v2 12/23] hisi_sas: add v2 int init and phy up handler John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 13/23] hisi_sas: add v2 phy down handler John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 14/23] hisi_sas: add v2 channel interrupt handler John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 15/23] hisi_sas: add v2 SATA " John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 16/23] hisi_sas: add v2 cq " John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 17/23] hisi_sas: add v2 path to send ssp frame John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 18/23] hisi_sas: add v2 code to send smp command John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 19/23] hisi_sas: add v2 code for itct setup and free John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 20/23] hisi_sas: add v2 path to send ATA command John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 21/23] hisi_sas: add v2 slot error handler John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 22/23] hisi_sas: add v2 tmf functions John Garry
2016-01-25 18:47 ` [RESEND PATCH v2 23/23] hisi_sas: update driver version to 1.1 John Garry
2016-02-02 2:12 ` [RESEND PATCH v2 00/23] HiSilicon SAS v2 hw support Martin K. Petersen
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