From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753406AbcAZVMU (ORCPT ); Tue, 26 Jan 2016 16:12:20 -0500 Received: from mail.skyhub.de ([78.46.96.112]:56870 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750728AbcAZVMP (ORCPT ); Tue, 26 Jan 2016 16:12:15 -0500 From: Borislav Petkov To: Ingo Molnar Cc: LKML Subject: [PATCH 02/10] x86/asm: Drop a comment left over from X86_OOSTORE Date: Tue, 26 Jan 2016 22:12:02 +0100 Message-Id: <1453842730-28463-3-git-send-email-bp@alien8.de> X-Mailer: git-send-email 2.3.5 In-Reply-To: <1453842730-28463-1-git-send-email-bp@alien8.de> References: <1453842730-28463-1-git-send-email-bp@alien8.de> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "Michael S. Tsirkin" The comment about wmb() being non-nop to deal with non-intel CPUs is a left over from before commit 09df7c4c8097 ("x86: Remove CONFIG_X86_OOSTORE"). It makes no sense now: in particular, wmb() is not a nop even for regular intel CPUs because of weird use-cases e.g. dealing with WC memory. Drop this comment. Signed-off-by: Michael S. Tsirkin Cc: Andrey Konovalov Cc: Andy Lutomirski Cc: Arnd Bergmann Cc: Davidlohr Bueso Cc: "H. Peter Anvin" Cc: Ingo Molnar Cc: Linus Torvalds Cc: "Paul E. McKenney" Cc: Peter Zijlstra Cc: Ralf Baechle Cc: Thomas Gleixner Cc: virtualization Link: http://lkml.kernel.org/r/1452715911-12067-3-git-send-email-mst@redhat.com Signed-off-by: Borislav Petkov --- arch/x86/include/asm/barrier.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h index 5bce7865b623..d2aa66a3a4b5 100644 --- a/arch/x86/include/asm/barrier.h +++ b/arch/x86/include/asm/barrier.h @@ -11,10 +11,6 @@ */ #ifdef CONFIG_X86_32 -/* - * Some non-Intel clones support out of order store. wmb() ceases to be a - * nop for these. - */ #define mb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "mfence", \ X86_FEATURE_XMM2) ::: "memory", "cc") #define rmb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "lfence", \ -- 2.3.5